SLVS632K January   2006  – January 2024 TPS5430 , TPS5431

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information (DDA Package)
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Oscillator Frequency
      2. 6.3.2  Voltage Reference
      3. 6.3.3  Enable (ENA) and Internal Slow Start
      4. 6.3.4  Undervoltage Lockout (UVLO)
      5. 6.3.5  Boost Capacitor (BOOT)
      6. 6.3.6  Output Feedback (VSENSE) and Internal Compensation
      7. 6.3.7  Voltage Feed-Forward
      8. 6.3.8  Pulse-Width-Modulation (PWM) Control
      9. 6.3.9  Overcurrent Limiting
      10. 6.3.10 Overvoltage Protection
      11. 6.3.11 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Operation near Minimum Input Voltage
      2. 6.4.2 Operation with ENA control
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 12-V Input to 5.0-V Output
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 7.2.1.2.2 Switching Frequency
          3. 7.2.1.2.3 Input Capacitors
          4. 7.2.1.2.4 Output Filter Components
            1. 7.2.1.2.4.1 Inductor Selection
            2. 7.2.1.2.4.2 Capacitor Selection
          5. 7.2.1.2.5 Output Voltage Set-Point
          6. 7.2.1.2.6 BOOT Capacitor
          7. 7.2.1.2.7 Catch Diode
          8. 7.2.1.2.8 Advanced Information
            1. 7.2.1.2.8.1 Output Voltage Limitations
            2. 7.2.1.2.8.2 Internal Compensation Network
            3. 7.2.1.2.8.3 Thermal Calculations
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Wide Input Voltage Ranges with TPS5430
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Wide Input Voltage Ranges with TPS5431
          1. 7.2.2.3.1 Design Requirements
          2. 7.2.2.3.2 Detailed Design Procedure
      3. 7.2.3 Circuit Using Ceramic Output Filter Capacitors
        1. 7.2.3.1 Design Requirements
        2. 7.2.3.2 Detailed Design Procedure
          1. 7.2.3.2.1 Output Filter Component Selection
          2. 7.2.3.2.2 External Compensation Network
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
7.2.1.2.8.2 Internal Compensation Network

The design equations given in the example circuit can be used to generate circuits using the TPS543x. These designs are based on certain assumptions and will tend to always select output capacitors within a limited range of ESR values. If a different capacitor type is desired, it can be possible to fit one to the internal compensation of the TPS543x. Equation 15 gives the nominal frequency response of the internal voltage-mode type III compensation network:

Equation 15. GUID-4E4D5C50-1BFE-4EDE-92C9-051239D50FBA-low.gif

where

  • fp0 = 2165 Hz, fz1 = 2170 Hz, fz2 = 2590 Hz
  • fp1 = 24 kHz, fp2 = 54 kHz, fp3 = 440 kHz
  • fp3 represents the non-ideal parasitics effect.

Using this information along with the desired output voltage, feed forward gain and output filter characteristics, the closed loop transfer function can be derived.