SLVSAA5A May 2010 – December 2015 TPS61071-Q1
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
As for all switching power supplies, the layout is an important step in the design, especially at high-peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the device. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to the ground pin of the device.
The feedback divider should be placed as close as possible to the ground pin of the device. To lay out the control ground, it is recommended to use short traces as well, separated from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current.
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component.
There are three basic approaches for enhancing thermal performance.
The maximum recommended junction temperature (TJ) of the TPS61071-Q1 device is 125°C. The thermal resistance of the 6-pin thin SOT package (DDC) is RθJA = 130°C/W. Specified regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 308 mW. More power can be dissipated if the maximum ambient temperature of the application is lower.