SLVSAE3A August   2010  – January 2016 TPS650231

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Electrical Characteristics: Control Signals
    7. 7.7  Electrical Characteristics: Supply Pins VCC, VINDCDC1, VINDCDC2, VINDCDC3, VINDCDC13
    8. 7.8  Electrical Characteristics: Supply Pins VBACKUP, VSYSIN, VRTC, VINLDO
    9. 7.9  Electrical Characteristics: VDCDC1 Step-Down Converter
    10. 7.10 Electrical Characteristics: VDCDC2 Step-Down Converter
    11. 7.11 Electrical Characteristics: VDCDC3 Step-Down Converter
    12. 7.12 Timing Requirements
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1  VRTC Output and Operation With or Without Backup Battery
      2. 8.3.2  Step-Down Converters, VDCDC1, VDCDC2, and VDCDC3
      3. 8.3.3  Power Save Mode Operation
      4. 8.3.4  Low-Ripple Mode
      5. 8.3.5  Soft-Start
      6. 8.3.6  100% Duty Cycle Low-Dropout Operation
      7. 8.3.7  Active Discharge When Disabled
      8. 8.3.8  Power-Good Monitoring
      9. 8.3.9  Low-Dropout Voltage Regulators
      10. 8.3.10 Undervoltage Lockout
      11. 8.3.11 Power-Up Sequencing
      12. 8.3.12 System Reset + Control Signals
        1. 8.3.12.1 DEFLDO1 and DEFLDO2
        2. 8.3.12.2 Interrupt Management and the INT Pin
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Serial Interface
    6. 8.6 Register Maps
      1. 8.6.1 VERSION Register Address: 00h (Read Only)
      2. 8.6.2 PGOODZ Register Address: 01h (Read Only)
      3. 8.6.3 MASK Register Address: 02h (Read or Write), Default Value: C0h
      4. 8.6.4 REG_CTRL Register Address: 03h (Read or Write), Default Value: FFh
      5. 8.6.5 CON_CTRL Register Address: 04h (Read or Write), Default Value: B1h
      6. 8.6.6 CON_CTRL2 Register Address: 05h (Read or Write), Default Value: 40h
      7. 8.6.7 DEFCORE Register Address: 06h (Read or Write), Default Value: 14h/1Eh
      8. 8.6.8 DEFSLEW Register Address: 07h (Read or Write), Default Value: 06h
      9. 8.6.9 LDO_CTRL Register Address: 08h (Read or Write), Default Value: Set with DEFLDO1 and DEFLDO2
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Input Voltage Connection
      2. 9.1.2 Unused Regulators
      3. 9.1.3 Reset Condition of DCDC1
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection for the DC-DC Converters
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Output Voltage Selection
        5. 9.2.2.5 VRTC Output
        6. 9.2.2.6 LDO1 and LDO2
        7. 9.2.2.7 TRESPWRON
        8. 9.2.2.8 VCC Filter
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Requirements for Supply Voltages Below 3.0 V
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

1 Features

  • 1.7-A, 90% Efficient Step-Down Converter for Processor Core (VDCDC1)
  • 1.2-A, Up to 95% Efficient Step-Down Converter for System Voltage (VDCDC2)
  • 0.8-A, 92% Efficient Step-Down Converter for Memory Voltage (VDCDC3)
  • 30-mA LDO and Switch for Real-Time Clock (VRTC)
  • 2 × 200-mA General-Purpose LDO
  • Dynamic Voltage Management for Processor Core
  • Preselectable LDO Voltage Using Two Digital Input Pins
  • Externally Adjustable Reset Delay Time
  • Battery Backup Functionality
  • Separate Enable Pins for Inductive Converters
  • I2C™-Compatible Serial Interface
  • 85-μA Quiescent Current
  • Low-Ripple PFM Mode
  • Thermal Shutdown Protection
  • Available in 40-Pin, 5-mm × 5-mm VQFN (RSB) or 49-Ball, 3-mm × 3-mm DSBGA (YFF) Package

2 Applications

  • Smart Phones
  • Netbooks and MIDs
  • Portable Media Players

3 Description

The TPS650231 device is an integrated power management IC for applications powered by one
Li-Ion or Li-Polymer cell, and which requires multiple power rails. The TPS650231 provides three highly efficient step-down converters targeted at providing the core voltage, peripheral, I/O, and memory rails in a processor-based system. The core converter allows for on-the-fly voltage changes through serial interface, allowing the system to implement dynamic power savings.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS650231 VQFN (40) 5.00 mm × 5.00 mm
DSBGA (49) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

TPS650231 Keygraphic.gif