SLVSAN6B February   2011  – September 2016 TPS61181A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Supply Voltage
      2. 8.3.2 Boost Regulator
      3. 8.3.3 Enable and Start-Up
      4. 8.3.4 Overcurrent, Overvoltage, and Short-Circuit Protection
      5. 8.3.5 IFB Pin Unused
    4. 8.4 Device Functional Modes
      1. 8.4.1 Current Program and PWM Dimming
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Audible Noise Reduction
        4. 9.2.2.4 Isolation MOSFET Selection
      3. 9.2.3 Application Curves
    3. 9.3 Additional Application Circuits
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device And Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Voltage range(2) VBAT and Fault –0.3 24 V
CIN and ISET –0.3 3.6
SW and VO –0.3 40
IFB1 to IFB6, EN and DCTRL –0.3 20
Continuous power dissipation See Thermal Information
Operating junction temperature range –40 150 °C
Storage temperature range –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±3000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±200
Machine mode (MM) 1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VBAT Battery input voltage range 4.5 24 V
VO Output voltage range Vin 38 V
L Inductor 4.7 10 μH
CO Output capacitor 2.2 10 μF
FPWM PWM dimming frequency at DPWM ≥ 1% 0.1 1 kHz
PWM dimming frequency at DPWM ≥ 5% 1 5
TA Operating ambient temperature –40 85 °C
TJ Operating junction temperature –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS61181A UNIT
RTE (WQFN)
16 PINS
RθJA Junction-to-ambient thermal resistance 43.1 °C/W
RθJCtop Junction-to-case (top) thermal resistance 38.3 °C/W
RθJB Junction-to-board thermal resistance 14.6 °C/W
RψJT Junction-to-top characterization parameter 0.4 °C/W
RψJB Junction-to-board characterization parameter 14.4 °C/W
RθJCbot Junction-to-case (bottom) thermal resistance 3.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

VBAT = 10.8 V, 0.1 μF at Cin, EN = logic high, IFB current = 20 mA, IFB voltage = 500 mV, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
VBAT Battery input voltage range 4.5 24 V
Vcin Cin pin output voltage 2.7 3.15 3.6 V
Iq_bat Operating quiescent current into VBAT Device enable, switching no load,
VIN = 24 V		 3 mA
IQ_sw Operating quiescent current into VO VO = 35 V 60 μA
ISD Shutdown current EN=GND 2 18 μA
Vbat_UVLO VBAT undervoltage lockout threshold VBAT rising 4.45 V
VBAT falling 3.9
Vbat_hys VBAT undervoltage lockout hysteresis VBAT rising – VBAT falling 220 mV
EN AND DCTRL
VH EN pin logic high voltage 2 V
VL EN pin logic low voltage 0.8 V
VH DCTRL pin logic high voltage 2 V
VL DCTRL pin logic low voltage 0.8 V
RPD Pulldown resistor on both pins VEN, DCTRL = 2 V 400 800 1600 kΩ
CURRENT REGULATION
VISET ISET pin voltage 1.204 1.229 1.253 V
KISET Current multiple Iout/ISET ISET current = 20 μA 970 1000 1030
IFB Current accuracy ISET current = 20 µA 19.4 20 20.6 mA
Km (Imax – Imin) / IAVG ISET current = 20 μA 1% 2.5%
Ileak IFB pin leakage current IFB voltage = 20 V on all pins 3 μA
IIFB_MAX Current sink max output current IFB = 500 mV 30 mA
BOOST OUTPUT REGULATION
VIFB_L VO dial up threshold ISET current = 20 μA 400 mV
VIFB_H VO dial down threshold ISET current = 20 μA 700 mV
Vreg_L Min VO regulation voltage 16 V
Vo_step VO stepping voltage 100 150 mV
POWER SWITCH
RPWM_SW PWM FET on-resistance 0.2 0.45 Ω
Rstart Start up charging resistance VO = 0 V 100 300 Ω
Vstart_r Isolation FET start-up threshold VIN – VO, VO ramp up 1.2 2 V
ILN_NFET PWM FET leakage current VSW = 35 V 1 μA
OSCILLATOR
fS Oscillator frequency 0.9 1 1.2 MHz
Dmax Maximum duty cycle IFB = 0 V 94%
Dmin Minimum duty cycle 7%
OS, SC, OVP AND SS
ILIM N-channel MOSFET current limit D = Dmax 1.5 3 A
Vovp VO overvoltage threshold Measured on the VO pin 38 39 40 V
Vovp_IFB IFB overvoltage threshold Measured on the IFBx pin 15 17 20 V
Vsc Short-circuit detection threshold VIN – VO, VO ramp down 1.7 2.5 V
Vsc_dly Short-circuit detection delay during start up 32 ms
FAULT OUTPUT
Vfault_high Fault high voltage Measured as VBAT – VFault 0.1 V
Vfault_low Fault low voltage Measured as VBAT – VFault, sink 0.1 mA
VIN = 15 V		 6 8 10 V
THERMAL SHUTDOWN
Tshutdown Thermal shutdown threshold 160 °C
Thysteresis Thermal shutdown threshold hysteresis 15 °C

7.6 Typical Characteristics

Table 1. Table of Graphs

Description (Reference to application circuit in Figure 16) Figure
Dimming Linearity Vbat = 10.8 V; VO=28.6 V, 9 LEDs; Iset= 20 μA; PWM Freq = 1 kHz Figure 1
Dimming Linearity Vbat = 10.8 V; VO=28.6 V, 9 LEDs; Iset= 20 μA; PWM Freq = 200 Hz Figure 2
Output Ripple VO = 28.6 V; Iset= 20 μA; PWM Freq = 200 Hz; Duty = 50% Figure 3
Switching Waveform Vbat = 10.8 V; Iset= 20μA Figure 4
Output Ripple at PWM Dimming Vbat = 10.8 V; Iset = 20 μA; PWM Freq = 200 Hz; Duty = 50%; CO = 4.7 μF Figure 5
Short Circuit Protection Vbat = 10.8 V; Iset = 20 μA Figure 6
Open WLED Protection Vbat = 10.8 V; Iset = 20 μA Figure 7
Startup Waveform Vbat = 10.8 V; Iset = 20 μA Figure 8
DC Load Efficiency Vbat = 5 V, 10.8 V, 19 V; VO = 28.6 V, 9 LEDs; L = 10 µH Figure 10
DC Load Efficiency Vbat = 5V, 10.8 V, 19 V; VO = 31.7 V, 10 LEDs; L =10 µH Figure 11
PWM Dimming Efficiency Vbat = 5V, 10.8 V and 19 V; VO = 25.5 V, 8 LEDs; PWM Freq = 1 kHz Figure 12
PWM Dimming Efficiency Vbat = 5V, 10.8 V and 19 V; VO = 28.6 V, 9 LEDs; PWM Freq = 1 kHz Figure 13
PWM Dimming Efficiency Vbat = 5V, 10.8 V and 19 V; VO = 31.7 V, 10 LEDs; PWM Freq = 1 kHz Figure 14
PWM Dimming Efficiency Vbat = 5V, 10.8 V and 19 V; VO=34.8 V, 11 LEDs; PWM Freq = 1 kHz Figure 15
TPS61181A dim_lin1_lvsan6.gif
1 kHz
Figure 1. PWM Dimming Linearity
TPS61181A out_rip_lvsan6.gif
COUT = 4.7 μF
Figure 3. PWM Dimming Output Ripple vs Input Voltage
TPS61181A outb_rip_dim_lvs801.gif
COUT = 4.7 μF
Figure 5. Output Ripple at PWM Dimming
TPS61181A openb_wield_lvs801.gif
Figure 7. Open WLED Protection
TPS61181A dim_lin2_lvsan6.gif
200 Hz
Figure 2. PWM Dimming Linearity
TPS61181A swtb_wf_lvs801.gif
Figure 4. Switching Waveform
TPS61181A outb_shrt_lvs801.gif
Figure 6. Output Short Protection
TPS61181A startup_lvs801.gif
Figure 8. Start-up Waveform