The DRV8834 provides a flexible motor driver solution for toys, printers, cameras, and other mechatronic applications. The device has two H-bridge drivers, and is intended to drive a bipolar stepper motor or two DC motors.
The output driver block of each H-bridge consists of N-channel power MOSFETs configured as an H-bridge to drive the motor windings. Each H-bridge includes circuitry to regulate or limit the winding current.
With proper PCB design, each H-bridge of the DRV8834 can driving up to 1.5-A RMS (or DC) continuously, at 25°C with a VM supply of 5 V. The device can support peak currents of up to 2.2 A per bridge. Current capability is reduced slightly at lower VM voltages.
Internal shutdown functions with a fault output pin are provided for overcurrent protection, short-circuit protection, undervoltage lockout and overtemperature. A low-power sleep mode is also provided.
The DRV8834 is packaged in a 24-pin HTSSOP or VQFN package with PowerPAD™ (Eco-friendly: RoHS & no Sb/Br).
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
DRV8834 | HTSSOP (24) | 7.80 mm × 4.40 mm |
VQFN (24) | 4.00 mm × 4.00 mm |
Changes from C Revision (June 2013) to D Revision
PIN | I/O | DESCRIPTION | EXTERNAL COMPONENTS OR CONNECTIONS |
||
---|---|---|---|---|---|
NAME | HTSSOP | VQFN | |||
POWER AND GROUND | |||||
GND | 21, PPAD |
18, PPAD |
— | Device ground | Both the GND pin and device PowerPAD must be connected to ground |
VM | 18, 19 | 15, 16 | — | Bridge A power supply | Connect to motor supply. A 10-µF (minimum) capacitor to GND is recommended. |
VINT | 20 | 17 | — | Internal supply | Bypass to GND with 2.2-μF (minimum), 6.3-V capacitor. Can be used to provide logic high voltage for configuration pins (except nSLEEP). |
VREFO | 24 | 21 | O | Reference voltage output | May be connected to AVREF/BVREF inputs. Do not place a bypass capacitor on this pin. |
VCP | 17 | 14 | O | High-side gate drive voltage | Connect a 0.01-μF, 16-V (minimum) X7R ceramic capacitor to VM. |
CONTROL (INDEXER MODE OR PHASE/ENABLE MODE) | |||||
nENBL/AENBL | 10 | 7 | I | Step motor enable/Bridge A enable | Indexer mode: Logic low enables all outputs. Phase/enable mode: Logic high enables the AOUTx outputs. Internal pulldown. |
STEP/BENBL | 11 | 8 | I | Step input/Bridge B enable | Indexer mode: Rising edge moves indexer to next step. Phase/enable mode: Logic high enables the BOUTx outputs. Internal pulldown. |
DIR/BPHASE | 12 | 9 | I | Direction input/Bridge B Phase | Indexer mode: Level sets direction of step. Phase/enable mode: Logic high sets BOUT1 high, BOUT2 low. Internal pulldown. |
M0/APHASE | 13 | 10 | I | Microstep mode/Bridge A phase | Indexer mode: Controls microstep mode (full, half, up to 1/32-step) along with M1. Phase/enable mode: Logic high sets AOUT1 high, AOUT2 low. Internal pulldown. |
M1 | 14 | 11 | I | Microstep mode/Disable state | Indexer mode: Controls microstep mode (full, half, up to 1/32-step) along with M0. Phase/enable mode: Determines the state of the outputs when xENBL = 0. Internal pulldown. |
CONFIG | 15 | 12 | I | Device configuration | Logic high to put the device in indexer mode. Logic low to put the device into phase/enable mode. State is latched at power up and sleep exit. Internal pulldown. |
nSLEEP | 1 | 22 | I | Sleep mode input | Logic high to enable device, logic low to enter low-power sleep mode and reset all internal logic. |
AVREF | 22 | 19 | I | Bridge A current set reference input | Reference voltage for AOUT winding current. In Indexer Mode, it should be tied to a reference voltage for the internal DAC (for example, VREFO). In Phase/Enable Mode, an external DAC can drive it for microstepping. |
BVREF | 23 | 20 | I | Bridge B current set reference input | Reference voltage for BOUT winding current. In Indexer Mode, it should be tied to a reference voltage for the internal DAC (for example, VREFO). In Phase/Enable Mode, an external DAC can drive it for microstepping. |
ADECAY | 3 | 24 | I | Decay mode for bridge A | Determines decay mode for H-Bridge A (or A and B in indexer mode) – slow, fast or mixed decay |
BDECAY | 2 | 23 | I | Decay mode for bridge B | Determines decay mode for H-Bridge B – slow, fast or mixed decay |
STATUS | |||||
nFAULT | 16 | 13 | OD | Fault output | Logic low when in fault condition (overtemp, overcurrent, undervoltage) |
OUTPUT | |||||
AISEN | 5 | 2 | IO | Bridge A ground/Isense | Connect to current sense resistor for bridge A, or GND if current control not needed |
BISEN | 8 | 5 | IO | Bridge B ground/Isense | Connect to current sense resistor for bridge B, or GND if current control not needed |
AOUT1 | 4 | 1 | O | Bridge A output 1 | Connect to motor winding A |
AOUT2 | 6 | 3 | O | Bridge A output 2 | |
BOUT1 | 9 | 6 | O | Bridge B output 1 | Connect to motor winding B |
BOUT2 | 7 | 4 | O | Bridge B output 2 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VM | Power supply voltage | –0.3 | 11.8 | V | |
AVREF, BVREF, VINT, ADECAY, BDECAY |
Analog input pin voltage | –0.5 | 3.6 | V | |
Digital input pin voltage | –0.5 | 7 | V | ||
xISEN pin voltage | –0.3 | 0.5 | V | ||
Peak motor drive output current, t < 1 µs | Internally limited | A | |||
TJ | Operating virtual junction temperature | –40 | 150 | °C | |
Tstg | Storage temperature | –60 | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±4000 | V | |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±1500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VM | Motor power supply voltage range(1) | 2.5 | 10.8 | V | |
VREF | VREF input voltage range(2) | 1 | 2.1 | V | |
IVINT | VINT external load current | 1 | mA | ||
IVREF | VREF external load current | 400 | µA | ||
VDIGIN | Digital input pin voltage range | –0.3 | 5.75 | V | |
IOUT | Continuous RMS or DC output current per bridge(3) | 1.5 | A |
THERMAL METRIC(1) | DRV8834 | UNIT | ||
---|---|---|---|---|
PWP [HTSSOP] | RGE [VQFN] | |||
24 PINS | 24 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 40.2 | 35.1 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 23.7 | 36.6 | |
RθJB | Junction-to-board thermal resistance | 21.9 | 12.2 | |
ψJT | Junction-to-top characterization parameter | 0.7 | 0.6 | |
ψJB | Junction-to-board characterization parameter | 21.7 | 12.2 | |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3.9 | 4 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
POWER SUPPLY | ||||||
IVM | VM operating supply current | VM = 5 V, excluding winding current | 2.4 | 4 | mA | |
VM = 10 V, excluding winding current | 2.75 | |||||
IVMQ | VM sleep mode supply current | VM = 5 V | 0.6 | 2 | μA | |
VM = 10 V | 9.6 | |||||
VUVLO | VM undervoltage lockout voltage | VM falling | 2.39 | V | ||
INTERNAL REGULATORS | ||||||
VINT | VINT voltage | VM > 3.3 V, IOUT = 0 A to 1 mA | 2.85 | 3 | 3.15 | V |
VREFO | VREF voltage | IOUT = 0 A to 400 µA | 1.9 | 2 | 2.1 | V |
LOGIC-LEVEL INPUTS | ||||||
VIL | Input low voltage | nSLEEP | 0.5 | V | ||
All other digital input pins | 0.7 | |||||
VIH | Input high voltage | nSLEEP | 2.5 | V | ||
All other digital input pins | 2 | |||||
VHYS | Input hysteresis | nSLEEP | 0.2 | V | ||
All except nSLEEP | 0.4 | |||||
RPD | Input pulldown resistance | nSLEEP | 500 | kΩ | ||
All except nSLEEP, M0 | 200 | |||||
IIL | Input low current | VIN = 0 | 1 | μA | ||
IIN | Input current (M0) | -20 | 20 | µA | ||
IIH | Input high current | VIN = 3.3 V, nSLEEP | 6.6 | 13 | μA | |
VIN = 3.3 V, all except nSLEEP | 16.5 | 33 | ||||
tDEG | Input deglitch time | 312 | 468 | ns | ||
nFAULT OUTPUT (OPEN-DRAIN OUTPUT) | ||||||
VOL | Output low voltage | IO = 5 mA | 0.5 | V | ||
IOH | Output high leakage current | VO = 3.3 V | 1 | μA | ||
H-BRIDGE FETs | ||||||
RDS(ON) | HS FET ON-resistance | VM = 5 V, IO = 500 mA, TJ = 25°C | 160 | 250 | mΩ | |
VM = 5 V, IO = 500 mA, TJ = 85°C | 190 | |||||
VM = 2.7 V, IO = 500 mA, TJ = 25°C | 200 | 295 | ||||
VM = 2.7 V, IO = 500 mA, TJ = 85°C | 240 | |||||
LS FET ON-resistance | VM = 5 V, IO = 500 mA, TJ = 25°C | 145 | 240 | |||
VM = 5 V, IO = 500 mA, TJ = 85°C | 180 | |||||
VM = 2.7 V, IO = 500 mA, TJ = 25°C | 190 | 285 | ||||
VM = 2.7 V, IO = 500 mA, TJ = 85°C | 235 | |||||
IOFF | Off-state leakage current | –2 | 2 | μA | ||
MOTOR DRIVER | ||||||
fPWM | Current control PWM frequency | Internal PWM frequency | 42.5 | kHz | ||
tBLANK | Current sense blanking time | VREF > 375 mV or DAC codes > 29% | 2.4 | µs | ||
VREF < 375 mV or DAC codes < 29% | 1.6 | |||||
tR | Rise time | VM = 5 V, 16 Ω to GND, 10% to 90% VM | 120 | ns | ||
tF | Fall time | VM = 5 V, 16 Ω to GND, 10% to 90% VM | 100 | ns | ||
PROTECTION CIRCUITS | ||||||
IOCP | Overcurrent protection trip level | 2 | A | |||
tOCP | Overcurrent protection period | VREF > 375 mV or DAC codes > 29% | 1.6 | µs | ||
VREF < 375 mV or DAC codes < 29% | 1.1 | |||||
tTSD | Thermal shutdown temperature | Die temperature | 150 | 160 | 180 | °C |
CURRENT CONTROL | ||||||
IREF | VREF input current | VREF = 3.3 V | –1 | 1 | µA | |
VTRIP | xISEN trip voltage | For 100% current step | xVREF/5 | V | ||
AISENSE | Current sense amplifier gain | Reference only | 5 | V/V |
NO. | PARAMETER | CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|---|
1 | fSTEP | Step frequency | 250 | kHz | ||
2 | tWH(STEP) | Pulse duration, STEP high | 1.9 | µs | ||
3 | tWL(STEP) | Pulse duration, STEP low | 1.9 | µs | ||
4 | tSU(STEP) | Setup time, command to STEP rising | 200 | ns | ||
5 | tH(STEP) | Hold time, command to STEP rising | 1 | µs | ||
6 | tWAKE | Wake-up time, nSLEEP inactive to STEP | 1 | ms |