SLVSB64I November 2011 – March 2018 TPS65217
PRODUCTION DATA.
When the nRESET pin is pulled low, all power rails, including LDO1 and LDO2, are powered down, and the default register settings are restored. The device stays powered down as long as the nRESET pin is held low, but for a minimum of 1 s. After the nRESET pin is pulled high, the device goes to the ACTIVE state, and the default power-up sequence executes. For more information, see RESET in the PMIC States section.