SLVSCB2 Data sheet

SLVSCB2D October 2013 – April 2018 TPS7B67-Q1

PRODUCTION DATA.

Figure 1. Line Regulation
(V_O = 1.5 V, I_L = 100 mA)

Figure 3. Quiescent Current vs Input Voltage
(V_O = 1.5 V)

Figure 5. Quiescent Current vs Input Voltage
(V_O = 18 V)

Figure 7. Load Regulation
(V_I = 14 V, V_O = 1.5 V)

Figure 9. ESR Stability vs Load Capacitance
(V_O ≥ 2.5 V)

Figure 11. Output Voltage vs Supply Voltage
(Fixed 3.3-V Version, I_L = 0)

Figure 13. Short to GND Current-Limit vs Temperature

Figure 15. Load Transient
10-µF Ceramic Output Capacitor

Figure 2. Ground Current vs Output Current
(V_I = 14 V, V_O = 1.5 V)

Figure 4. Ground Current vs Output Current
(V_I = 24 V, V_O = 18 V)

Figure 6. Dropout Voltage vs Output Current

Figure 8. ESR Stability vs Load Capacitance
(V_O ≤ 2.5 V)

Figure 10. Output Voltage vs Supply Voltage
(Fixed 5-V Version, I_L = 0)

Figure 12. Power-Supply Rejection Ratio vs Frequency
(V_I = 14 V, C_O = 47 µF, I_L = 25 mA)

Figure 14. Current-Limit vs Temperature