SLVSD05G March   2016  – August 2024 TPS56C215

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  PWM Operation and D-CAP3™ Control Mode
      2. 6.3.2  Eco-mode Control
      3. 6.3.3  4.7-V LDO
      4. 6.3.4  MODE Selection
      5. 6.3.5  Soft Start and Prebiased Soft Start
      6. 6.3.6  Enable and Adjustable UVLO
      7. 6.3.7  Power Good
      8. 6.3.8  Overcurrent Protection and Undervoltage Protection
      9. 6.3.9  UVLO Protection
      10. 6.3.10 Thermal Shutdown
      11. 6.3.11 Output Voltage Discharge
    4. 6.4 Device Functional Modes
      1. 6.4.1 Light Load Operation
      2. 6.4.2 Standby Operation
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 External Component Selection
          1. 7.2.2.1.1 Output Voltage Set Point
          2. 7.2.2.1.2 Switching Frequency and MODE Selection
          3. 7.2.2.1.3 Inductor Selection
          4. 7.2.2.1.4 Output Capacitor Selection
          5. 7.2.2.1.5 Input Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Marking

Overview

The TPS56C215 is a high-density, synchronous, step-down buck converter which can operate from 3.8-V to 17-V input voltage (VIN). The device has 13.5-mΩ and 4.5-mΩ integrated MOSFETs that enable high efficiency up to 12 A. The device employs D-CAP3 control mode that provides fast transient response with no external compensation components and an accurate feedback voltage. The control topology provides seamless transition between FCCM operating mode at higher load condition and DCM/Eco-mode operation at lighter load condition. DCM/Eco-mode allows the TPS56C215 to maintain high efficiency at light load. The TPS56C215 is able to adapt to both low equivalent series resistance (ESR) output capacitors such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.

The TPS56C215 has three selectable switching frequencies (FSW) (400 kHz, 800 kHz, and 1200 kHz), which gives the flexibility to optimize the design for higher efficiency or smaller size. There are two selectable current limits. All these options are configured by choosing the right voltage on the MODE pin.

The TPS56C215 has a 4.7-V internal LDO that creates bias for all internal circuitry. There is a feature to overdrive this internal LDO with an external voltage on the VREG5 pin which improves the efficiency of the converter. The undervoltage lockout (UVLO) circuit monitors the VREG5 pin voltage to protect the internal circuitry from low input voltages. The device has an internal pullup current source on the EN pin which can enable the device even with the pin floating.

Soft-start time can be selected by connecting a capacitor to the SS pin. The device is protected from output short, undervoltage, and overtemperature conditions.