SLVSD68 December   2015 TPS92691 , TPS92691-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Internal Regulator and Undervoltage Lockout (UVLO)
      2. 7.3.2  Oscillator
      3. 7.3.3  Gate Driver
      4. 7.3.4  Rail-to-Rail Current Sense Amplifier
      5. 7.3.5  Transconductance Error Amplifier
      6. 7.3.6  Switch Current Sense and Internal Slope Compensation
      7. 7.3.7  Analog Adjust Input
      8. 7.3.8  PWM Input and Series Dimming FET Gate Driver Output
      9. 7.3.9  Soft-Start
      10. 7.3.10 Current Monitor Output
      11. 7.3.11 Overvoltage Protection
      12. 7.3.12 Thermal Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Duty Cycle Considerations
      2. 8.1.2  Inductor Selection
      3. 8.1.3  Output Capacitor Selection
      4. 8.1.4  Input Capacitor Selection
      5. 8.1.5  Main Power MOSFET Selection
      6. 8.1.6  Rectifier Diode Selection
      7. 8.1.7  LED Current Programming
      8. 8.1.8  Switch Current Sense Resistor and Slope Compensation
      9. 8.1.9  Feedback Compensation
      10. 8.1.10 Soft-Start
      11. 8.1.11 Overvoltage Protection
      12. 8.1.12 PWM Dimming Considerations
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Boost LED Driver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Calculating Duty Cycle
          2. 8.2.1.2.2  Setting Switching Frequency
          3. 8.2.1.2.3  Inductor Selection
          4. 8.2.1.2.4  Output Capacitor Selection
          5. 8.2.1.2.5  Input Capacitor Selection
          6. 8.2.1.2.6  Main N-Channel MOSFET Selection
          7. 8.2.1.2.7  Rectifying Diode Selection
          8. 8.2.1.2.8  Programming LED Current
          9. 8.2.1.2.9  Setting Switch Current Limit and Slope Compensation
          10. 8.2.1.2.10 Deriving Compensator Parameters
          11. 8.2.1.2.11 Setting Start-up Duration
          12. 8.2.1.2.12 Setting Overvoltage Protection Threshold
          13. 8.2.1.2.13 PWM Dimming Considerations
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Buck-Boost LED Driver
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Calculating Duty Cycle
          2. 8.2.2.2.2  Setting Switching Frequency
          3. 8.2.2.2.3  Inductor Selection
          4. 8.2.2.2.4  Output Capacitor Selection
          5. 8.2.2.2.5  Input Capacitor Selection
          6. 8.2.2.2.6  Main N-Channel MOSFET Selection
          7. 8.2.2.2.7  Rectifier Diode Selection
          8. 8.2.2.2.8  Setting Switch Current Limit and Slope Compensation
          9. 8.2.2.2.9  Programming LED Current
          10. 8.2.2.2.10 Deriving Compensator Parameters
          11. 8.2.2.2.11 Setting Startup Duration
          12. 8.2.2.2.12 Setting Overvoltage Protection Threshold
          13. 8.2.2.2.13 PWM Dimming Consideration
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

PWP Package
16-Pin HTSSOP with PowerPAD™
Top View
TPS92691 TPS92691-Q1 PinOut_01_SLVSD68.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 VIN — Input supply for the internal VCC regulator. Bypass with 100-nF capacitor to GND located close to the controller.
2 SS I/O Soft-start programming pin. Connect a capacitor to AGND to extend the start-up time. Switching can be disabled by shorting the pin to GND.
3 RT/SYNC I/O Oscillator frequency programming pin. Connect a resistor to AGND to set the switching frequency. The internal oscillator can be synchronized by coupling an external clock pulse through 100-nF series capacitor.
4 PWM I PWM dimming input. Driving the pin below 2.3 V (typ), turns off switching, idles the oscillator, disconnects the COMP pin, and sets DDRV output to ground. The input signal duty cycle controls the average LED current through PWM dimming operation. Connect to VCC when not used for PWM dimming.
5 COMP I/O Transconductance error amplifier output. Connect compensation network to achieve desired closed-loop response.
6 IADJ I LED current reference input. Connecting pin to VCC with 100-kΩ series resistor sets internal reference voltage to 2.42 V and the current sense threshold, V(CSP-CSN)to 172 mV. The pin can be modulated by external voltage source from 0 V to 2.25 V to implement analog dimming.
7 IMON O LED current report pin. The LED current sensed by CSP/CSN input is reported as VIMON = 14 × ILED × Rcs. Bypass with a 1-nF ceramic capacitor to AGND.
8 AGND — Analog ground. Return for the internal voltage reference and analog circuit. Connect to circuit ground, GND, to complete return path.
9 CSN I Current sense amplifier negative input (–). Connect directly to the negative node of LED current sense resistor RCS).
10 CSP I Current sense amplifier positive input (+). Connect directly to the positive node of LED current sense resistor RCS).
11 DDRV O Series dimming FET gate driver output. Connect to gate of external N-channel MOSFET or a level-shift circuit with P-channel MOSFET to implement series FET PWM dimming.
12 OVP I Hysteretic overvoltage protection input. Connect resistor divider from output voltage to set OVP threshold and hysteresis.
13 PGND — Power ground connection pin for internal N-channel MOSFET gate drivers. Connect to circuit ground, GND, to complete return path.
14 IS I Switch current sense input. Connected to the switch current sense resistor, RIS, in the source of the N-channel MOSFET.
15 GATE O N-channel MOSFET gate driver output. Connect to gate of external switching N-channel MOSFET.
16 VCC — VCC bias supply pin. Locally decouple to PGND using a 2.2-µF to 4.7-µF ceramic capacitor located close to the controller.
PowerPAD — The AGND and PGND pin must be connected to the exposed PowerPAD for proper operation. This PowerPAD must be connected to PCB ground plane using multiple vias for good thermal performance.