SLVSDC2C February 2016 – August 2021 TPS65981
PRODUCTION DATA
During initialization the TPS65981 enables device internal hardware and loads default configurations. The 48-MHz clock is enabled and the TPS65981 persistence counters begin monitoring VBUS and VIN_3V3. These counters ensure the supply powering the TPS65981 is stable before continuing the initialization process. The initialization concludes by enabling the thermal monitoring blocks and thermal shutdown protection, along with the ADC, CRC, GPIO and NVIC blocks.