SLVSDG5C March   2016  – August 2020 TPD3S014-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings—AEC Specification
    3. 6.3 ESD Ratings—IEC Specification
    4. 6.4 ESD Ratings—ISO Specification
    5. 6.5 Recommended Operating Conditions
    6. 6.6 Thermal Information
    7. 6.7 Electrical Characteristics: TJ = TA = 25°C
    8. 6.8 Electrical Characteristics: –40°C ≤ TA ≤ 105°C
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Enable
      3. 8.3.3 Internal Charge Pump
      4. 8.3.4 Current Limit
      5. 8.3.5 Output Discharge
      6. 8.3.6 Input and Output Capacitance
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With VIN < 4 V (Minimum VIN)
      2. 8.4.2 Operation With EN Control
      3. 8.4.3 Operation of Level 4 IEC 61000-4-2 ESD Protection
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Implementing Active Low Logic
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation and Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Electrical Characteristics: TJ = TA = 25°C

VIN = 5 V, VEN = VIN, IOUT = 0 A (unless otherwise noted). Parameters over a wider operational range are shown in Electrical Characteristics: –40°C ≤ TA ≤ 105°C table.
PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT
POWER SWITCH
RDS(on) Input – Output resistance 97 120
–40°C ≤ (TJ, TA) ≤ +85°C 97 140
CURRENT LIMIT
IOS(2) Current limit, see Figure 8-3 0.67 0.85 1.01 A
SUPPLY CURRENT
ISD Supply current, switch disabled IOUT = 0 A 0.02 1 µA
–40°C ≤ (TJ, TA) ≤ +85°C, VIN = 5.5 V, IOUT = 0 A 2
ISE Supply current, switch enabled IOUT = 0 A 66 74 µA
–40°C ≤ (TJ, TA) ≤ +85°C, VIN = 5.5 V, IOUT = 0 A 85
IREV Reverse leakage current VOUT = 5 V, VIN = 0 V, Measure IVOUT 0.2 1 µA
–40°C ≤ (TJ, TA) ≤ +85°C, VOUT = 5 V, VIN = 0 V, Measure IVOUT 5
OUTPUT DISCHARGE
RPD Output pull-down resistance(3) VIN = VOUT = 5 V, disabled 400 456 600 Ω
ESD PROTECTION
ΔCIO Differential capacitance between the D1, D2 lines ƒ = 1 MHz, VIO = 2.5 V 0.02 pF
CIO (D1, D2 to GND) ƒ = 1 MHz, VIO = 2.5 V 1.4 pF
RDYN Dynamic on-resistance D1, D2 IEC clamps(4) Dx to GND 0.2 Ω
GND to Dx 0.2 Ω
Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature
See the Current Limit for explanation of this parameter.
These Parameters are provided for reference only, and do not constitute a part of TI’s published device specifications for purposes of TI’s product warranty.
RDYN was extracted using the least squares first of the TLP characteristics between I = 20 A and I = 30 A.