SLVSDS9E July 2018 – August 2021 TPS63805 , TPS63806 , TPS63807
PRODUCTION DATA
The power good goes high-impedance once the output is above 95% of the nominal voltage, and is driven low once the output voltage falls below typically 90% of the nominal voltage. This feature also indicates overvoltage and device shutdown cases as shown in Table 9-1. The PG pin is an open-drain output and is specified to sink up to 1 mA. The power-good output requires a pullup resistor connecting to any voltage rail less than 5.5 V. The PG signal can be used to sequence multiple rails by connecting it to the EN pin of other converters. Leave the PG pin unconnected when not used.
LOGIC SIGNALS | PG LOGIC STATUS | ||||
---|---|---|---|---|---|
EN | VO | VI | OVP | IVP | |
X | < 1.8 V | < UVLO_R | X | X | Undefined |
LOW | X | > UVLO_F | X | X | LOW |
HIGH | VO < 0.9 × target-VO | > 1.3V | X | X | LOW |
HIGH | X | > UVLO_F | HIGH | X | LOW |
HIGH | X | > UVLO_F | X | HIGH | LOW |
HIGH | VO > 0.95 × target-VO | > UVLO_F | LOW | LOW | HIGH Z |