SLVSE46A November 2017 – January 2018 TPS65680
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
UNDERVOLTAGE LOCKOUT AND POWER-GOOD COMPARATORS |
|||||||
Undervoltage lockout threshold (VIN) | VIN rising | 2.55 | 2.6 | 2.8 | V | ||
VIN falling | 2.45 | 2.525 | 2.55 | V | |||
Hysteresis | 50 | 250 | mV | ||||
Power-good threshold (VGH) | VGH rising | 6 | 7 | 8 | V | ||
VGH falling | 3.8 | 4.0 | 4.2 | V | |||
Hysteresis | 2 | V | |||||
Deglitch time | 1.1 | ms | |||||
Power-good threshold (VGL1, VGL2) | VGL1/2 rising | –3 | –2.5 | –2 | V | ||
VGL1/2 falling | –4 | –3.5 | –3 | V | |||
Hysteresis | 0.9 | V | |||||
Deglitch time | 1.1 | ms | |||||
Power-good threshold (OTP LDO) | V(OTP_LDO) rising | 92 | 95 | 98 | % | ||
V(OTP_LDO) falling | 92 | 95 | 98 | % | |||
Hysteresis | 0 | % | |||||
VDET | |||||||
VDET threshold | Adjustable through I2C interface in 100-mV steps. | 2.7 | 4.1 | V | |||
SUPPLY CURRENTS | |||||||
Supply current (VIN) | VIN = 2.0 V, (VIN rising); device still in UVLO | 700 | µA | ||||
Supply current (VIN) | Device in STANDBY mode; outputs unloaded | 1.2 | mA | ||||
Supply current (VGH) | 250 | µA | |||||
Supply current (VGL1) | –150 | µA | |||||
Supply current (VGL2) | –150 | µA | |||||
OTP LDO | |||||||
Output voltage | VGH = 10 V | 8.0 | V | ||||
HIGH VOLTAGE CLOCK OUTPUTS (GCKx) | |||||||
Switch ON resistance | High-side, IO = 10 mA (sourcing) | 6 | 15 | Ω | |||
Low-side, IO = -10 mA (sinking) | 5 | 15 | |||||
Propagation delay | LS_CLK to GCKx, 50% level; CL = 1 nF; PLL bypassed. | Output rising | 100 | ns | |||
Output falling | 100 | ||||||
CHARGE SHARING SWITCH (CSx) | |||||||
Switch ON resistance | 10 mA (sourcing); measured from GCKx to corresponding CSx pin | 65 | 130 | Ω | |||
Propagation delay | LS_CLK to CSx, 90% level; CL = 1 nF. | Output rising | 150 | ns | |||
Output falling | 150 | ||||||
HIGH VOLTAGE CONTROL OUTPUTS (GSPx, GCP, GGPx) | |||||||
Switch ON resistance | High-side, IO = 10 mA (sourcing) | 12 | 25 | Ω | |||
Low-side, IO = -10 mA (sinking) | 11 | 25 | |||||
Propagation delay | LS_CLK to GSPx/GCP/GGPx, 50% level; CL = 1 nF; PLL bypassed | Output rising | 200 | ns | |||
Output falling | 200 | ||||||
SWITCHED LOW-SIDE SUPPLY (VSS) | |||||||
Switch ON resistance | High-side, IO = 10 mA (sourcing) | 12 | 25 | Ω | |||
Low-side, IO = -10 mA (sinking) | 11 | 25 | |||||
Propagation delay | LS_CLK to VSS, 50% level; CL = 1 nF; PLL bypassed | Output rising | 200 | ns | |||
Output falling | 200 | ||||||
VGH OUTPUT DISCHARGE | |||||||
Pulldown current | VGH ≥ 2.0 V | 8 | mA | ||||
OVER-CURRENT PROTECTION | |||||||
OCP threshold range | Adjustable through I2C interface in 20-mA steps | 20 | 320 | mA | |||
OCP threshold accuracy | Nominal threshold = 200 mA | –35 | 15 | % | |||
Comparator analog delay time | 0.75 | 1 | µs | ||||
I/O LEVELS | |||||||
Low-level input voltage (LS_START, LN_CLK, LS_CNTRL, SCL, SDA, I2CSEL) | 0.55 | V | |||||
High-level input voltage (LS_START, LN_CLK, LS_CNTRL, SCL, SDA, I2CSEL) | 1.25 | V | |||||
Input bias current (LS_START, LN_CLK) | –1 | 1 | µA | ||||
Low level output voltage (SDA, SCL) | IO = 3 mA (sinking) | 0.4 | V | ||||
High level output current (leakage) (SCL, SDA) | VO = 3.3 V | 1 | µA | ||||
Internal pull-up resistor (LS_CNTRL) | 500 | kΩ | |||||
Enable delay | Programmable through I2C in 2-ms steps. | 0 | 510 | ms | |||
PLL | |||||||
Maximum output frequency | 15 | MHz | |||||
Minimum output frequency | 3 | MHz | |||||
Output frequency range | 2 | 15 | MHz | ||||
PLL lock time | Frequency error < 450 ppm; LN_CLK = 40 kHz | 8 | ms | ||||
INTERNAL OSCILLATOR | |||||||
Frequency | 2.00 | MHz | |||||
I2C ADDRESS | |||||||
7-bit slave address for sequencer configuration and pattern memory | I2CSEL = low | 0x42 | |||||
I2CSEL = high | 0x43 | ||||||
NONVOLATILE MEMORY | |||||||
Minimum number of write cycles | 3 | ||||||
Maximum number of write cycles | 9 | ||||||
Write time | 80 | ms | |||||
Time-out | 100 | 120 | ms | ||||
Data retention | TJ ≤ 85°C | 10 | y | ||||
MISCELLANEOUS TIMING PARAMETERS | |||||||
Boot time | Measured from VIN > UVLO to ready to accept I2C data | 1.5 | ms | ||||
THERMAL SHUTDOWN | |||||||
Thermal shutdown threshold | 130 | 150 | °C |