SLVSE46A November 2017 – January 2018 TPS65680
PRODUCTION DATA.
Back to .
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
OTPLDO_EN | OCP_VGL2 | OCP_VGL1 | OCP_VGH | FORCE_LSPG | D1_TIME[2:0] | ||
R/W | R/W | R/W | R/W | R/W | R/W | ||
OTP | OTP | OTP | OTP | OTP | OTP |
LEGEND: R/W = Read/Write; R = Read only ; -- = No NVM option; ROM = Read Only Memory; OTP = One Time Programmable; EEPROM = EEPROM |
Bit | Field | Type | Reset | Description | |||
---|---|---|---|---|---|---|---|
7 | OTPLDO_EN | R/W | 0 | Enables OTP LDO 0 : disabled 1 : enabled |
|||
6 | OCP_VGL2 | R/W | 0 | Enables OCP for VGL2 supply pin input. 0 : Over current sensing from VGL2 is disabled 1 : Over current sensing from VGL2 is active |
|||
5 | OCP_VGL1 | R/W | 0 | Enables OCP for VGL1 supply pin input. 0 : Over current sensing from VGL1 is disabled 1 : Over current sensing from VGL1 is active |
|||
4 | OCP_VGH | R/W | 0 | Enables OCP for VGH supply pin input. 0 : Over current sensing from VGH is disabled 1 : Over current sensing from VGH is active |
|||
3 | FORCE_LSPG | R/W | 0 | Overrides input power-good detection. When enabled, LSPG signal is forced high independent of actual input voltage level. 0 : disabled 1 : enabled |
|||
2:0 | D1_TIME[2:0] | R/W | 000 | Defines the duration of panel discharge step 1. 000 : 1 ms 001 : 2 ms 010 : 4 ms 011 : 8 ms 100 : 16 ms 101 : 32 ms 110 : 64 ms 111 : 128 ms |