SLVSEI2A November   2018  – May 2019 TPS56339

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      TPS56339 Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Advanced Emulated Current Mode Control
      2. 7.3.2 Enable and Adjusting Undervoltage Lockout
      3. 7.3.3 Soft Start and Pre-Biased Soft Start
      4. 7.3.4 Voltage Reference
      5. 7.3.5 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Dropout Conditions
      6. 7.3.6 Overcurrent and Undervoltage Protection
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Operation
    5. 7.5 Light-Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Resistors Selection
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Bootstrap Capacitor Selection
      3. 8.2.3 Undervoltage Lockout Set Point
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

8.2.2.6 Bootstrap Capacitor Selection

A 0.1-µF ceramic capacitor must be connected between the BOOT to SW pin for proper operation. TI recommends to use a ceramic capacitor with X5R or better grade dielectric. The capacitor must have a 10-V or higher voltage rating. In addition, TI recommends in series one boot resistor to make the device more robust, so a 30-Ω of R3 are required to be used between BOOT to bootstrap capacitor, C4.