SLVSEI2A November   2018  – May 2019 TPS56339

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      TPS56339 Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Advanced Emulated Current Mode Control
      2. 7.3.2 Enable and Adjusting Undervoltage Lockout
      3. 7.3.3 Soft Start and Pre-Biased Soft Start
      4. 7.3.4 Voltage Reference
      5. 7.3.5 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Dropout Conditions
      6. 7.3.6 Overcurrent and Undervoltage Protection
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Operation
    5. 7.5 Light-Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Resistors Selection
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Bootstrap Capacitor Selection
      3. 8.2.3 Undervoltage Lockout Set Point
      4. 8.2.4 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

8.2.2.4 Output Capacitor Selection

After selecting the inductor, the output capacitor needs to be optimized. The LC filter used as the output filter has double pole at:

Equation 14. TPS56339 eq-14-SLVSEI2.gif

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the device. The low frequency phase is 180°. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. A high frequency zero introduced by internal circuit that reduces the gain roll off to –20 dB per decade and increases the phase to 90° one decade above the zero frequency. The inductor and capacitor for the output filter must be selected so that the double pole of Equation 14 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement, make sure that the L1·COUT_E value meets the range of L1·COUT_E value recommended in Table 2.

Table 2. Recommended Component Values

OUTPUT VOLTAGE(1)
(V)		 R6(2)
(kΩ)		 R7
(kΩ)		 L1(3)
(µH)		 COUT(4)
(µF)		 Range of L1·COUT_E(5)
(μH×μF)
1.05 3.16 10.0 1.5 2×22 48 to 188
1.8 12.4 10.0 2.2 2×22 64 to 250
2.5 21.5 10.0 3.3 2×22 87 to 334
3.3 31.6 10.0 4.7 2×22 107 to 404
5 52.3 10.0 5.6 2×22 93 to 334
12 140 10.0 6.8 3×22 45 to 137
(1) Please use the recommended L1 and COUT combination of the higher and closest output rail for the unlisted output rails.
(2) R6 = 0 Ω for VOUT = 0.8 V.
(3) Inductance values are calculated based on VIN=19V, but they can also be used for other input voltages. Users can calculate their preferred inductance value per Equation 10.
(4) The COUT is the sum of nominal output capacitance. Two 22-uF, 0805, 16V capacitors are recommended for VOUT ≤ 5V, three 22-uF, 0805, 25VDC capacitors are recommended for VOUT > 5V.
(5) The COUT_E is the effective value after derating, the value of L1·COUT_E should be within in the range.

The capacitor value and ESR determines the amount of output voltage ripple. TheTPS56339 is intended for use with ceramic or other low ESR capacitors. Use Equation 15 to determine the required RMS current rating for the output capacitor.

Equation 15. TPS56339 eq-18-SLVSEI2.gif

For this design two Murata GRM21BR61C226ME44 22-uF, 0805, 16-V output capacitors are used. From the data sheet the estimated DC derating of 51.8% at room temperature with AC voltage of 0.2V. The total output effective capacitance is approximately 22.8 μF. The value of L1·COUT_E is 127.7 μH×μF, which is within the recommended range.