SLVSES4D September   2019  – June 2024 TPS54J060

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Enable and Internal LDO
      2. 6.3.2  Split Rail and External LDO
      3. 6.3.3  Output Voltage Setting
      4. 6.3.4  Soft Start and Output-Voltage Tracking
      5. 6.3.5  Frequency and Operation Mode Selection
      6. 6.3.6  D-CAP3™ Control Mode
      7. 6.3.7  Current Sense and Positive Overcurrent Protection
      8. 6.3.8  Low-side FET Negative Current Limit
      9. 6.3.9  Power Good
      10. 6.3.10 Overvoltage and Undervoltage Protection
      11. 6.3.11 Out-Of-Bounds Operation (OOB)
      12. 6.3.12 Output Voltage Discharge
      13. 6.3.13 UVLO Protection
      14. 6.3.14 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Auto-Skip Eco-Mode Light Load Operation
      2. 6.4.2 Forced Continuous-Conduction Mode
      3. 6.4.3 Pre-Bias Start-up
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Choose the Switching Frequency and Operation Mode (MODE Pin)
        2. 7.2.2.2  Choose the Output Inductor (L)
        3. 7.2.2.3  Set the Current Limit (TRIP)
        4. 7.2.2.4  Choose the Output Capacitors (COUT)
        5. 7.2.2.5  Choose the Input Capacitors (CIN)
        6. 7.2.2.6  Feedback Network (FB Pin)
        7. 7.2.2.7  Soft Start Capacitor (SS/REFIN Pin)
        8. 7.2.2.8  EN Pin Resistor Divider
        9. 7.2.2.9  VCC Bypass Capacitor
        10. 7.2.2.10 BOOT Capacitor
        11. 7.2.2.11 Series BOOT Resistor and RC Snubber
        12. 7.2.2.12 PGOOD Pullup Resistor
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Ordering Information

5.6 Typical Characteristics

TPS54J060 High-Side FET RdsON
Figure 5-1 High-Side FET RdsON
TPS54J060 Overcurrent Limit
Figure 5-3 Overcurrent Limit
TPS54J060 Enable Voltage
Figure 5-5 Enable Voltage
TPS54J060 VIN UVLO
Figure 5-7 VIN UVLO
TPS54J060 PGOOD Thresholds
Figure 5-9 PGOOD Thresholds
TPS54J060 Zero Crossing Threshold
Figure 5-11 Zero Crossing Threshold
TPS54J060 Non-Switching Supply CurrentFigure 5-13 Non-Switching Supply Current
TPS54J060 600-kHz Switching Frequency vs Load Current
VOUT = 1.2 VL = 1 µHMODE = FCCM
Figure 5-15 600-kHz Switching Frequency vs Load Current
TPS54J060 2200-kHz Switching Frequency vs Load Current
VOUT = 2.5 VL = 0.47 µHMODE = FCCM
Figure 5-17 2200-kHz Switching Frequency vs Load Current
TPS54J060 Low-Side FET RdsON
Figure 5-2 Low-Side FET RdsON
TPS54J060 Negative Overcurrent Limit
Figure 5-4 Negative Overcurrent Limit
TPS54J060 Vref
Figure 5-6 Vref
TPS54J060 VCC UVLO
Figure 5-8 VCC UVLO
TPS54J060 PGOOD Sink Current
Figure 5-10 PGOOD Sink Current
TPS54J060 Soft-Start Sourcing Current
Figure 5-12 Soft-Start Sourcing Current
TPS54J060 Shutdown Supply CurrentFigure 5-14 Shutdown Supply Current
TPS54J060 1100-kHz Switching Frequency vs Load Current
VOUT = 1.2 VL = 1 µHMODE = FCCM
Figure 5-16 1100-kHz Switching Frequency vs Load Current
TPS54J060 1100-kHz Switching Frequency vs Load Current – DCM
VOUT = 1.2 VL = 1 µHMODE = DCM
Figure 5-18 1100-kHz Switching Frequency vs Load Current – DCM