SLVSF62B November 2020 – September 2021 TPS25858-Q1 , TPS25859-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY VOLTAGE (IN PIN) | ||||||
ISD | Shutdown quiescent current; measured at IN pin. | VEN/UV = 0, -40℃ ≤ TJ ≤ 85℃ | 34 | 63 | uA | |
IQ | Operating quiescent current (DCDC disable) | VEN = VSENSE, CCx = open, -40℃ ≤ TJ ≤ 85℃ | 200 | µA | ||
VOVLO_R | Voltage on VIN pin when buck regulator stops switching | 26.6 | 27.5 | 28.4 | V | |
VOVLO_HYS | Hysteresis | 0.5 | V | |||
ENABLE AND UVLO (EN/UVLO PIN) | ||||||
VEN/UVLO_R | Rising threshold for not in External UVLO | VEN/UV rising threshold | 1.26 | 1.3 | 1.34 | V |
VEN/UVLO_HYS | Hysteresis | VEN/UVLO falling | 100 | mV | ||
VPA/B_EN_H | PA_EN, PB_EN input level required to turn on PA_BUS and PB_BUS Load Switch (TPS25859-Q1) | VPA_EN or VPB_EN rising threshold | 1.6 | 1.98 | V | |
VPA/B_EN_L | PA_EN, PB_EN input level required to turn off PA_BUS and PB_BUS Load Switch (TPS25859-Q1) | VPA_EN or VPB_EN falling threshold | 0.97 | 1.5 | V | |
VEN1/2_HYS | Hysteresis(TPS25859-Q1) | VPA_EN or VPB_EN falling threshold | 100 | mV | ||
BOOTSTRAP | ||||||
VBTST_UVLO | Bootstrap voltage UVLO threshold | 2.2 | V | |||
RBOOT | Bootstrap pull-up resistence | VSENSE - BOOT = 0.1 V | 7.7 | Ω | ||
BUCK REGULATOR | ||||||
IL-SC-HS | High-side current limit | BOOT - SW = 5 V | 10.2 | 11.4 | 12.6 | A |
IL-SC-LS | Low-side current limit | SENSE = 5 V | 8.5 | 10 | 11.5 | A |
IL-NEG-LS | Low-side negative current limit | SENSE = 5 V | -7 | -5 | -3 | A |
IZC | Zero current detector threshold | 0.01 | A | |||
VSENSE | BUCK Output voltage | CC1 or CC2 pulldown resistance = Rd, VSET float or pull up to VSENSE, TJ = 25℃ | -1% | 5.1 | +1% | V |
CC1 or CC2 pulldown resistance = Rd, VSET short to AGND, TJ =25℃ | -1% | 5.17 | +1% | V | ||
CC1 or CC2 pulldown resistance = Rd, RVSET =40.2KΩ, TJ =25℃ | -1% | 5.3 | +1% | V | ||
CC1 or CC2 pulldown resistance = Rd, RVSET =80.6KΩ, TJ =25℃ | -1% | 5.4 | +1% | V | ||
VSENSE | BUCK Output voltage accuracy | CC1 or CC2 pulldown resistance = Rd, -40℃≤ TJ ≤150℃ | –2 | 2 | % | |
VDCDC_UVLO_R | SENSE input level to enable DCDC switching | VSENSE rising, CC1 or CC2 pull down resistance = Rd | 3.85 | 4 | 4.15 | V |
VDCDC_UVLO_HYS | Hysteresis | VSENSE falling, CC1 or CC2 pull down resistance = Rd | 0.4 | V | ||
VDROP | Dropout voltage ( VIN - VSENSE ) | VIN = VSENSE + VDROP, VSENS = 5.1 V, IPA_BUS = 3 A, IPB_BUS = 3 A | 300 | mV | ||
RDS-ON-HS | High-side MOSFET ON-resistance | IPA_BUS = 3 A, IPB_BUS = 3 A, BOOT - SW = 5 V, -40℃≤ TJ ≤150℃ | 18 | 34 | mΩ | |
RDS-ON-LS | Low-side MOSFET ON-resistance | IPA_BUS = 3 A, IPB_BUS = 3 A, VSENSE = 5 V, -40℃≤ TJ ≤150℃ | 9.5 | 18.5 | mΩ | |
POWER SWITCH AND CURRENT LIMIT | ||||||
RDS-ON_USB | USB Load Switch MOSFET ON-resistance | IPA_BUS = 3 A, I PB_BUS = 3 A; -40℃≤TJ≤150℃ | 6.8 | 11.73 | mΩ | |
RDS-ON_OUT | OUT Load Switch MOSFET ON-resistance | IOUT = 0.3 A | 230 | mΩ | ||
RDS-ON_VCONN | On-state resistance | TJ = 25°C, ICCn = 0.25 A | 410 | 550 | mΩ | |
RDS-ON_VCONN | On-state resistance | –40°C ≤TJ ≤ 150°C, ICCn = 0.25 A | 410 | 740 | mΩ | |
VUSBLS_UVLO_R | Voltage on SENSE pin that will enable the USB Load Switch | 3.95 | 4.1 | 4.25 | V | |
VUSBLS_UVLO_HYS | Hysteresis | 200 | mV | |||
RBUS_DCHG | Discharge resistance for Port A or Port B BUS | Apply 5V on PA_BUS or PB_BUS, CC1 or CC2 = Rd | 250 | 500 | 750 | Ω |
VTH_R_BUS_DCHGb | Rising threshold voltage for BUS not discharged | 670 | 700 | 730 | mV | |
VTH_HYS_BUS_DCHG | Hysteresis | 100 | mV | |||
VBUS_DCHG_BLEED | BUS bleed resistance | VPx_BUS = 4 V, No sink termination on CC lines, Time>tW_BUS_DCHG | 100 | 150 | 200 | KΩ |
IOS_HI | BUS output short-circuit secondary current limit | RILIM = 48.7 KΩ | 849 | 1061 | 1273 | mA |
RILIM = 19.1 KΩ | 2434 | 2704 | 2974 | mA | ||
RILIM = 15.4 KΩ | 3018 | 3354 | 3689 | mA | ||
RILIM = 12.4 KΩ | 3748 | 4165 | 4581 | mA | ||
RILIM = 11.5 KΩ | 4040 | 4490 | 4938 | mA | ||
RILIM = 9.53 KΩ | 4876 | 5418 | 5960 | mA | ||
RILIM = 0 Ω(short to GND) | 4828 | 5680 | 6532 | mA | ||
RILIM = 11.5 KΩ, TJ =25℃ | 4265 | 4490 | 4714 | mA | ||
IOS_BUS | BUS output short-circuit current limit | RILIM = 48.7 KΩ | 530.4 | 663 | 800 | mA |
RILIM = 19.1 KΩ | 1521 | 1690 | 1859 | mA | ||
RILIM = 15.4 KΩ | 1886.4 | 2096 | 2305.6 | mA | ||
RILIM = 12.4 KΩ | 2342.7 | 2603 | 2863.3 | mA | ||
RILIM = 11.5 KΩ | 2525.4 | 2806 | 3086.6 | mA | ||
RILIM = 9.53 KΩ | 3047.4 | 3386 | 3724.6 | mA | ||
RILIM = 0 Ω(short to GND) | 3017.5 | 3550 | 4082.5 | mA | ||
RILIM =11.5 KΩ, TJ =25℃ | 2666 | 2806 | 2946 | mA | ||
IOS_OUT | OUT output short-circuit current limit | Short circuit current limit | 390 | 450 | 495 | mA |
IOS_VCONN | VCONN output short-circuit current limit | Short circuit current limit | 240 | 300 | 360 | mA |
CABLE COMPENSATION VOLTAGE | ||||||
VDROP_COM | Cable compensation voltage | IPA_BUS or IPB_BUS = 2.4 A, VSET = GND(set 5.17 V output) | 70 | 90 | 110 | mV |
CC CONNECT MANAGEMENT | ||||||
ISRC_CC_3A | Sourcing current | CC pin voltage: 0 V ≤ VCCn ≤ 2.45 V | 304 | 330 | 356 | µA |
ISRC_CC_1.5A | Sourcing current in thermal management(Temp warm) | CC pin voltage: 0 V ≤ VCCn ≤ 1.5 V , TA> 85℃ | 167 | 180 | 194 | µA |
ISRC_CC_DFLT | Sourcing current in thermal management(Temp hot) | CC pin voltage: 0 V ≤ VCCn ≤ 1.5 V , TA> 85℃ | 64 | 80 | 105 | µA |
IREV | Reverse leakage current | CCx is the CC pin under test, CCy is the other CC pin. CC pin voltage VCCx = 5.5 V, CCy floating, VEN_UV = 0 V or VSENSE, 0 V ≤ VIN ≤ 26 V IREV is current into CCx pin | 2.75 | 10 | µA | |
VTH_R | Rising threshold voltage for VCONN not discharged | CC pin that was providing VCONN in previous SINK state | 670 | 700 | 730 | mV |
VTH_HYS | Hysteresis | 100 | mV | |||
FAULT (TPS25859-Q1) | ||||||
VOL | PA_FAULT, PB_FAULT Output low voltage | ISNK_PIN = 1 mA | 250 | mV | ||
IOFF | PA_FAULT, PB_FAULT Off-state leakage | VPIN = 5.5 V | 2.2 | µA | ||
BC 1.2 DOWNSTREAM CHARGING PORT (TPS25858-Q1) | ||||||
RDPM_SHORT | DP and DM shorting resistance | 70 | 200 | Ω | ||
DIVIDER 3 MODE (TPS25858-Q1) | ||||||
VDP_DIV3 | DP output voltage | 2.57 | 2.7 | 2.84 | V | |
VDM_DIV3 | DM output voltage | 2.57 | 2.7 | 2.84 | V | |
RDP_DIV3 | DP output impedance | IDP_IN = –5 µA | 24 | 30 | 36 | kΩ |
RDM_DIV3 | DM output impedance | IDM_IN = –5 µA | 24 | 30 | 36 | kΩ |
1.2-V MODE (TPS25858-Q1) | ||||||
VDP_1.2V | DP output voltage | 1.12 | 1.2 | 1.26 | V | |
VDM_1.2V | DM output voltage | 1.12 | 1.2 | 1.26 | V | |
RDP_1.2V | DP output impedance | IDP_IN = –5 µA | 84 | 100 | 126 | kΩ |
RDM_1.2V | DM output impedance | IDM_IN = –5 µA | 84 | 100 | 126 | kΩ |
FREQ/SYNC THRESHOLD | ||||||
VIH_FREQ/SYNC | FREQ/SYNC high threshold for external clock synchronization | Amplitude of SYNC clock AC signal (measured at FREQ/SYNC pin) | 2 | V | ||
VIL_FREQ/SYNC | FREQ/SYNC low threshold for external clock synchronization | Amplitude of SYNC clock AC signal (measured at FREQ/SYNC pin) | 0.8 | V | ||
TEMPERATURE SENSING | ||||||
VWARN_HIGH | Temperature warning threshold rising | As percentage to VSENSE | 0.475 | 0.5 | 0.525 | V/V |
VWARN_HYS | Hysteresis | As percentage to VSENSE | 0.1 | V/V | ||
VHOT_HIGH | Temperature Hot assert threshold rising to reduce SENS voltage | As percentage to VSENSE | 0.618 | 0.65 | 0.683 | V/V |
VHOT_HYS | Hysteresis | As percentage to VSENSE | 0.1 | V/V | ||
VR_VSENS | VSENSE voltage decay when Temperature Hot assert | TS pin voltage rise above 0.65 * VSENSE | 4.77 | V | ||
THERMAL SHUTDOWN | ||||||
TLS_SD | USB Load Switch Over Temperature | Shutdown threshold | 160 | °C | ||
Recovery threshold | 150 | °C | ||||
TSD | Thermal shutdown | Shutdown threshold | 166 | °C | ||
Recovery threshold | 154 | °C |