SLVSFF0B
June 2020 – July 2022
DRV8436E
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
Device Options
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
PWM Motor Drivers
7.3.2
Bridge Control
7.3.3
Current Regulation
7.3.4
Decay Modes
7.3.4.1
Slow Decay
7.3.4.2
Mixed Decay
7.3.4.3
Fast Decay
7.3.4.4
Smart tune Dynamic Decay
7.3.4.5
Blanking time
7.3.5
Charge Pump
7.3.6
Linear Voltage Regulators
7.3.7
Logic and Quad-Level Pin Diagrams
7.3.7.1
nFAULT Pin
7.3.8
Protection Circuits
7.3.8.1
VM Undervoltage Lockout (UVLO)
7.3.8.2
VCP Undervoltage Lockout (CPUV)
7.3.8.3
Overcurrent Protection (OCP)
7.3.8.4
Thermal Shutdown (OTSD)
7.3.8.5
36
7.4
Device Functional Modes
7.4.1
Sleep Mode (nSLEEP = 0)
7.4.2
Operating Mode (nSLEEP = 1)
7.4.3
Functional Modes Summary
8
Application and Implementation
8.1
Application Information
8.2
Primary Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Current Regulation
8.3
Typical Application
8.3.1
Design Requirements
8.3.2
Detailed Design Procedure
8.3.2.1
Current Regulation
8.3.2.2
Stepper Motor Speed
8.3.2.3
Decay Modes
9
Power Supply Recommendations
9.1
Bulk Capacitance
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Related Links
11.3
Receiving Notification of Documentation Updates
11.4
Community Resources
11.5
Trademarks
12
Mechanical, Packaging, and Orderable Information
7.2
Functional Block Diagrams
Figure 7-1
DRV8436E Block Diagram
Figure 7-2
DRV8436P Block Diagram