SLVSFJ2B December   2020  – February 2023 TPS22950

PRODUCTION DATA  

  1. 1 Features
  2. 2 Application
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Current Limiting (TPS22950, TPS22950C)
      2. 9.3.2 Current Limiting (TPS22950L)
      3. 9.3.3 Adjusting the Current Limit
      4. 9.3.4 Reverse Current Blocking (TPS22950, TPS22950C)
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.4 Thermal Information

THERMAL METRIC(1) TPS22950 UNIT
DDC(SOT) YBH (WCSP)
6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 104.8 135.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 57.6 1.4 °C/W
RθJB Junction-to-board thermal resistance 36.3 39.5 °C/W
ΨJT Junction-to-top characterization parameter 12.8 0.9 °C/W
ΨJB Junction-to-board characterization parameter 36.0 39.5 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.