Because the TPS2586x-Q1 integrates two USB current-limit switches, it provides current limit to prevent USB port overheating. The USB current limit threshold is fixed at 2.73 A with a maximum ±10% variation overtemperature on each USB port to follow the Type-A specification. The TPS2586x-Q1 provides built-in soft-start circuitry that controls the rising slew rate of the output voltage to limit inrush current and voltage surges.

The TPS2586x-Q1 engages the two-level current limit scheme, which has one typical current limit, I_{OS_BUS}, and the secondary current limit, I_{OS_HI}. The secondary current limit, I_{OS_HI}, is 1.6x the primary current limit, I_{OS_BUS}.The secondary current limit acts as the current limit threshold for a deglitch time, tIOS_HI_DEG, then the USB power switch current limit threshold is set back to I_{OS_BUS}.

The secondary current limit, I_{OS_HI}, allows the USB port pull out a larger current for a short time during transient overload conditions, which can bring benefits for USB port special overload testing like MFi OCP. In a normal application, once the device is powered on and USB port is not in UVLO, the USB port current limit threshold is overridden by the secondary current limit, I_{OS_HI}, so the USB port can output as high as a 1.6 × I_{OS_BUS} current for typically 2 ms. After the deglitch time, t_{IOS_HI_DEG}, the current limit threshold is set back to the typical current with I_{OS_BUS}. The secondary current limit threshold does not resume until after the t_{IOS_HI_RST} deglitch time, which is typically 16 ms. If there is an inrush current higher than the I_{OS_HI} threshold, the current limit is set back to I_{OS_BUS} immediately, without waiting for a t_{IOS_HI_DEG}.

The TPS2586x-Q1 responds to overcurrent conditions by limiting output current to I_{OS_BUS} as shown in previous equation. When an overload condition occurs, the device maintains a constant output current and the output voltage reduces accordingly. Three possible overload conditions can occur:

• The first condition is when a short circuit or overload is applied to the USB output when the device is powered up or enabled. There can be inrush current and once it triggers the approximate 8-A threshold. A fast turnoff circuit is activated to turn off the USB power switch within t_{IOS_USB} before the current limit control loop is able to respond (shown in Figure 10-5). After the fast turnoff is triggered, the USB power switch current-sense amplifier is over-driven during this time and momentarily disables the internal N-channel MOSFET to turn off USB port. The current-sense amplifier then recovers and ramps the output current with a soft start. If the USB port is still in overcurrent condition, the short circuit and overload hold the output near zero potential with respect to ground and the power switch ramps the output current to I_{OS_BUS}. If the overcurrent limit condition lasts longer than 4.1 ms, the corresponding USB channel enters hiccup mode with 524 ms of off-time and 4.1 ms of on-time.
  Figure 10-5 Response Time to BUS Short-Circuit
• The second condition is the load current increases above I_{OS_BUS} but below the I_{OS_HI} setting. The device allows the USB port to output this large current for t_{IOS_HI_DEG}, without limiting the USB port current to I_{OS_BUS}. After the t_{IOS_HI_DEG} deglitch time, the device limits the output current to I_{OS_BUS} and works in a constant current-limit mode. If the load demands a current greater than I_{OS_BUS}, the USB output voltage decreases to I_{OS_BUS} × R_LOAD for a resistive load, which is shown in Figure 10-6. If the overcurrent limit condition lasts longer than 4.1 ms, the corresponding USB channel enters hiccup mode with 524 ms of off-time and 4.1 ms of on-time. Another USB channel still works normally.
  Figure 10-6 BUS Overcurrent Protection
• The third condition is the load current increases just over the I_{OS_HI} setting. In this case, the load current does not trigger the fast turnoff. The USB power switch current limit threshold is set back to the primary current limit, I_{OS_BUS}, immediately. If the load still demands a current greater than I_{OS_BUS}, the USB output voltage decreases to I_{OS_BUS} × R_LOAD for a resistive load, which is shown in Figure 10-7. If the overcurrent limit condition lasts longer than 4.1 ms, the corresponding USB channel enters hiccup mode with 524 ms of off-time and 4.1 ms of on-time. Another USB channel still works normally.

Figure 10-7 BUS Overcurrent Protection: Two-Level Current Limit

The TPS2586x-Q1 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the previously mentioned cases. Thermal limiting turns off the internal NFET and starts when the NFET junction temperature exceeds 160°C (typical). The device remains off until the NFET junction temperature cools 10°C (typical) and then restarts. This extra thermal protection mechanism can help prevent further junction temperature rise, which can cause the device to turn off due to junction temperature exceeding the main thermal shutdown threshold, T_SD.