SLVSFU8C January   2022  – June 2024 TPS62843

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Smart Enable and Shutdown (EN)
      2. 7.3.2 Soft Start
      3. 7.3.3 VSET Pin: Output Voltage Selection
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Switch Current Limit, Short-Circuit Protection
      6. 7.3.6 Thermal Shutdown
      7. 7.3.7 Output Voltage Discharge
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Save Mode Operation
      2. 7.4.2 100% Mode Operation
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Revision History

Changes from Revision B (September 2023) to Revision C (June 2024)

  • Added a clarification that the minimum effective output capacitance is 4μFGo
  • Deleted the preview note from the SOT563 packageGo
  • Added a column for the SOT563 package to add the pin numbers for the SOT563 packageGo
  • Added an Input Buffer block to the EN pin in the functional block diagramGo
  • Added a statement in the description saying " The high level of the EN pin must not exceed VIN voltage level" to clarify correct pin usageGo
  • Deleted the term ILIMF and replaced with IHS(OC) for the high side FET and replaced with ILS(OC)for the low side FETGo
  • Deleted the erroneous load transient plot (Output Voltage vs Output Current for VOUT 1.2V, and IOUT step = 100uA to 400mA) and replaced with the correct plotGo

Changes from Revision A (May 2023) to Revision B (September 2023)

  • Added SOT563 package to the documentGo

Changes from Revision * (January 2022) to Revision A (May 2023)

  • Changed document status from Advance Information to Production DataGo