SLVSG41 January   2022 TPS7H4003-SEP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Adjusting the Output Voltage
      4. 7.3.4  Safe Start-Up Into Prebiased Outputs
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Enable and Adjust UVLO
      7. 7.3.7  Adjustable Switching Frequency and Synchronization (SYNC)
        1. 7.3.7.1 Internal Oscillator Mode
        2. 7.3.7.2 External Synchronization Mode
        3. 7.3.7.3 Primary-Secondary Operation Mode
      8. 7.3.8  Soft-Start (SS/TR)
      9. 7.3.9  Power Good (PWRGD)
      10. 7.3.10 Sequencing
      11. 7.3.11 Output Overvoltage Protection (OVP)
      12. 7.3.12 Overcurrent Protection
        1. 7.3.12.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.12.2 Low-Side MOSFET Overcurrent Protection
      13. 7.3.13 Thermal Shutdown
      14. 7.3.14 Turn-On Behavior
      15. 7.3.15 Slope Compensation
        1. 7.3.15.1 Slope Compensation Requirements
      16. 7.3.16 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fixed-Frequency PWM Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Operating Frequency
        2. 8.2.2.2 Output Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Output Schottky Diode
        5. 8.2.2.5 Input Capacitor Selection
        6. 8.2.2.6 Soft-Start Capacitor Selection
        7. 8.2.2.7 Undervoltage Lockout (UVLO) Set Point
        8. 8.2.2.8 Output Voltage Feedback Resistor Selection
          1. 8.2.2.8.1 Minimum Output Voltage
        9. 8.2.2.9 Compensation Component Selection
      3. 8.2.3 Parallel Operation
      4. 8.2.4 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.3.8 Soft-Start (SS/TR)

The device uses the lower voltage of the internal voltage reference or the SS/TR pin voltage as the reference voltage and regulates the output accordingly. A CSS capacitor on the SS/TR pin to GND implements a soft-start time. Equation 5 shows the equation for the nominal soft-start time, tSS. This is the time it will take VOUT to go from 10% to 90% of the programmed voltage. The voltage reference (VREF) is 0.605 V and the soft-start charge current (ISS) is 2.5 μA. When calculating the soft-start time tSS, it is important to take into account the variation of the parameters CSS, VREF and ISS as these may cause tSS to deviate from the nominal value in the actual implementation.

Equation 5. GUID-E7C0348E-9A09-4C30-B73C-41902027A707-low.gif

When any of the following four scenarios occur the SS/TR pin is discharged:

  • the input UVLO is triggered,
  • the EN pin is pulled below 1.05 V,
  • the high-side switch current limit threshold is exceeded, or
  • a thermal shutdown event occurs.

With the exception of the scenario where the high-side current limit threshold is exceeded, the device will then stop switching and enter into low current operation. At the subsequent power-up, when the shutdown condition is removed, the device does not start switching until it has discharged its SS/TR pin to ground ensuring proper soft-start behavior.

The device will enter into a pulse-skipping mode during start-up in the event that VSENSE is greater than the voltage at the SS/TR pin. During this period, the high-side switch will remain off and the low-side switch will remain on until VSENSE again falls below the voltage at SS/TR.