SLVSGH5B March 2023 – June 2024 ADC12DJ5200SE
PRODUCTION DATA
A data scrambler is available to scramble the data before transmission across the channel. Scrambling is used to remove the possibility of spectral peaks in the transmitted data due to repetitive data streams. The scrambler is optional for 8B/10B encoded modes, however it is mandatory for 64B/66B encoded modes to have sufficient spectral content for clock recovery and adaptive equalization and to maintain DC balance to allow AC coupling of the transmitter to the receiver. The scrambler operates on the data before encoding, such that the 8B/10B scrambler scrambles the 8-bit octets before 10-bit encoding and the 64B/66B scrambler scrambles the 64-bit block before the sync header insertion (66-bit encoding). The JESD204C receiver automatically synchronizes its descrambler to the incoming scrambled data stream. For 8B/10B encoding, the initial lane alignment sequence (ILA) is never scrambled. Scrambling can be enabled by setting SCR (in the JESD204C control register) for 8B/10B encoding modes, but it is automatically enabled in 64B/66B modes. The scrambling polynomial is different for 8B/10B encoding and 64B/66B encoding schemes as defined by the JESD204C standard.