SLVSGI0C September   2022  – June 2024 DRV8411

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Diagrams
  8. 7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 External Components
    4. 8.4 Feature Description
      1. 8.4.1 Bridge Control
        1. 8.4.1.1 Parallel Bridge Interface
      2. 8.4.2 Current Regulation
      3. 8.4.3 Protection Circuits
        1. 8.4.3.1 Overcurrent Protection (OCP)
        2. 8.4.3.2 Thermal Shutdown (TSD)
        3. 8.4.3.3 Undervoltage Lockout (UVLO)
    5. 8.5 Device Functional Modes
      1. 8.5.1 Active Mode
      2. 8.5.2 Low-Power Sleep Mode
      3. 8.5.3 Fault Mode
    6. 8.6 Pin Diagrams
      1. 8.6.1 Logic-Level Inputs
  10. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Typical Application
        1. 9.1.1.1 Stepper Motor Application
          1. 9.1.1.1.1 Design Requirements
          2. 9.1.1.1.2 Detailed Design Procedure
            1. 9.1.1.1.2.1 Stepper Motor Speed
            2. 9.1.1.1.2.2 Current Regulation
            3. 9.1.1.1.2.3 Stepping Modes
              1. 9.1.1.1.2.3.1 Full-Stepping Operation
              2. 9.1.1.1.2.3.2 Half-Stepping Operation with Fast Decay
              3. 9.1.1.1.2.3.3 Half-Stepping Operation with Slow Decay
          3. 9.1.1.1.3 Application Curves
        2. 9.1.1.2 Dual BDC Motor Application
          1. 9.1.1.2.1 Design Requirements
          2. 9.1.1.2.2 Detailed Design Procedure
            1. 9.1.1.2.2.1 Motor Voltage
            2. 9.1.1.2.2.2 Current Regulation
            3. 9.1.1.2.2.3 Sense Resistor
          3. 9.1.1.2.3 Application Curves
        3. 9.1.1.3 Thermal Considerations
          1. 9.1.1.3.1 Maximum Output Current
          2. 9.1.1.3.2 Power Dissipation
          3. 9.1.1.3.3 Thermal Performance
            1. 9.1.1.3.3.1 Steady-State Thermal Performance
            2. 9.1.1.3.3.2 Transient Thermal Performance
        4. 9.1.1.4 Multi-Sourcing with Standard Motor Driver Pinout
    2. 9.2 Power Supply Recommendations
      1. 9.2.1 Bulk Capacitance
      2. 9.2.2 Power Supply and Logic Sequencing
    3. 9.3 Layout
      1. 9.3.1 Layout Guidelines
      2. 9.3.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Community Resources
    4. 10.4 Trademarks
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.4.3.3 Undervoltage Lockout (UVLO)

Whenever the voltage on the VM pin falls below the UVLO falling threshold voltage, VUVLO, all circuitry in the device is disabled, the output FETS are disabled, and all internal logic is reset. Normal operation resumes when the VVM voltage rises above the UVLO rising threshold as shown in Figure 8-7. The nFAULT pin is driven low during an undervoltage condition and is released after operation starts again.

When VVM is close to 0 V, the internal circuitry may not bias properly, and the open-drain pull-down on the nFAULT pin may release.

DRV8411 VM UVLO OperationFigure 8-7 VM UVLO Operation