SLVSGO0
October 2024
TPS25763-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Recommended Components
6.5
Thermal Information
6.6
Buck-Boost Regulator
6.7
CC Cable Detection Parameters
6.8
CC VCONN Parameters
6.9
CC PHY Parameters
6.10
Thermal Shutdown Characteristics
6.11
Oscillator Characteristics
6.12
ADC Characteristics
6.13
TVSP Parameters
6.14
Input/Output (I/O) Characteristics
6.15
BC1.2 Characteristics
6.16
I2C Requirements and Characteristics
6.17
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Device Power Management and Supervisory Circuitry
8.3.1.1
VIN UVLO and Enable/UVLO
8.3.1.2
Internal LDO Regulators
8.3.2
TVSP Device Configuration and ESD Protection
8.3.3
External NFET and LSGD
8.3.4
Buck-Boost Regulator
8.3.4.1
Buck-Boost Regulator Operation
8.3.4.2
Switching Frequency, Frequency Dither, Phase-Shift and Synchronization
8.3.4.3
VIN Supply and VIN Over-Voltage Protection
8.3.4.4
Feedback Paths and Error Amplifiers
8.3.4.5
Transconductors and Compensation
8.3.4.6
Output Voltage DAC, Soft-Start and Cable Droop Compensation
8.3.4.7
VBUS Overvoltage Protection
8.3.4.8
VBUS Undervoltage Protection
8.3.4.9
Current Sense Resistor (RSNS) and Current Limit Operation
8.3.4.10
Buck-Boost Peak Current Limits
8.3.5
USB-PD Physical Layer
8.3.5.1
USB-PD Encoding and Signaling
8.3.5.2
USB-PD Bi-Phase Marked Coding
8.3.5.3
USB-PD Transmit (TX) and Receive (Rx) Masks
8.3.5.4
USB-PD BMC Transmitter
8.3.5.5
USB-PD BMC Receiver
8.3.5.6
Squelch Receiver
8.3.6
VCONN
8.3.7
Cable Plug and Orientation Detection
8.3.7.1
Configured as a Source
8.3.7.2
Configured as a Sink
8.3.7.3
Configured as a DRP
8.3.7.4
Overvoltage Protection (Px_CC1, Px_CC2)
8.3.8
ADC
8.3.8.1
ADC Divider Ratios
8.3.9
BC 1.2, Legacy and Fast Charging Modes (Px_DP, Px_DM)
8.3.10
DisplayPort Hot-Plug Detect (HPD)
8.3.11
USB2.0 Low-Speed Endpoint
8.3.12
Digital Interfaces
8.3.12.1
General GPIO
8.3.12.2
I2C Buffer
8.3.13
I2C Interface
8.3.13.1
I2C Interface Description
8.3.13.2
I2C Clock Stretching
8.3.13.3
I2C Address Setting
8.3.13.4
Unique Address Interface
8.3.13.5
I2C Pullup Resistor Calculation
8.3.14
Digital Core
8.3.14.1
Device Memory
8.3.14.2
Core Microprocessor
8.3.15
NTC Input
8.3.16
Thermal Sensors and Thermal Shutdown
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Application GUI Selections
9.2.2.2
EEPROM Selection
9.2.2.3
EN/UVLO
9.2.2.4
Sense Resistor, RSNS, RCSP, RCSN and CFILT
9.2.2.5
Inductor Currents
9.2.2.6
Output Capacitor
9.2.2.7
Input Capacitor
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
106