DRV8329 4.5 to 60 V Three-phase BLDC Gate Driver

1 Features

65-V Three Phase Half-Bridge Gate Driver
- Drives 3 High-Side and 3 Low-Side N-Channel MOSFETs (NMOS)
- 4.5 to 60-V Operating Voltage Range
- Supports 100% PWM Duty Cycle with Trickle Charge pump
Bootstrap based Gate Driver Architecture
- 1000-mA Maximum Peak Source Current
- 2000-mA Maximum Peak Sink Current
Integrated Current Sense Amplifier with low input offset (optimized for 1 shunt)
- Adjustable Gain (5, 10, 20, 40 V/V)
Hardware interface provides simple configuration
Ultra-low power sleep mode <1 uA at 25 ̊C
4-ns (typ) propagation delay matching between phases
Independent driver shutdown path (DRVOFF)
65-V tolerant wake pin (nSLEEP)
Supports negative transients upto -10V on SHx
6x and 3x PWM Modes
Supports 3.3-V, and 5-V Logic Inputs
Accurate LDO (AVDD), 3.3 V ±3%, 80 mA
Compact QFN Packages and Footprints
Adjustable VDS overcurrent threshold through VDSLVL pin
Adjustable deadtime through DT pin
Efficient System Design With Power Blocks
Integrated Protection Features
- PVDD Undervoltage Lockout (PVDDUV)
- GVDD Undervoltage (GVDDUV)
- Bootstrap Undervoltage (BST_UV)
- Overcurrent Protection (VDS_OCP, SEN_OCP)
- Thermal Shutdown (OTSD)
- Fault Condition Indicator (nFAULT)