SLVSH09A November   2023  – June 2024 TPS6522005-EP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  System Control Thresholds
    6. 5.6  BUCK1 Converter
    7. 5.7  BUCK2, BUCK3 Converter
    8. 5.8  General Purpose LDOs (LDO1, LDO2)
    9. 5.9  General Purpose LDOs (LDO3, LDO4)
    10. 5.10 GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO1, GPO2, GPIO, MODE/RESET, MODE/STBY, VSEL_SD/VSEL_DDR)
    11. 5.11 Voltage and Temperature Monitors
    12. 5.12 I2C Interface
    13. 5.13 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Power-Up Sequencing
      2. 6.3.2  Power-Down Sequencing
      3. 6.3.3  Push Button and Enable Input (EN/PB/VSENSE)
      4. 6.3.4  Reset to SoC (nRSTOUT)
      5. 6.3.5  Buck Converters (Buck1, Buck2, and Buck3)
        1. 6.3.5.1 Dual Random Spread Spectrum (DRSS)
      6. 6.3.6  Linear Regulators (LDO1 through LDO4)
      7. 6.3.7  Interrupt Pin (nINT)
      8. 6.3.8  PWM/PFM and Low Power Modes (MODE/STBY)
      9. 6.3.9  PWM/PFM and Reset (MODE/RESET)
      10. 6.3.10 Voltage Select pin (VSEL_SD/VSEL_DDR)
      11. 6.3.11 General Purpose Inputs or Outputs (GPO1, GPO2, and GPIO)
      12. 6.3.12 I2C-Compatible Interface
        1. 6.3.12.1 Data Validity
        2. 6.3.12.2 Start and Stop Conditions
        3. 6.3.12.3 Transferring Data
    4. 6.4 Device Functional Modes
      1. 6.4.1 Modes of Operation
        1. 6.4.1.1 OFF State
        2. 6.4.1.2 INITIALIZE State
        3. 6.4.1.3 ACTIVE State
        4. 6.4.1.4 STBY State
        5. 6.4.1.5 Fault Handling
    5. 6.5 Multi-PMIC Operation
    6. 6.6 NVM Programming
      1. 6.6.1 TPS6522005-EP default NVM settings
      2. 6.6.2 NVM programming in Initialize State
      3. 6.6.3 NVM Programming in Active State
    7. 6.7 User Registers
    8. 6.8 Device Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Typical Application Example
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
        1. 7.2.3.1 Buck1, Buck2, Buck3 Design Procedure
        2. 7.2.3.2 LDO1, LDO2 Design Procedure
        3. 7.2.3.3 LDO3, LDO4 Design Procedure
        4. 7.2.3.4 VSYS, VDD1P8
        5. 7.2.3.5 Digital Signals Design Procedure
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.11 Voltage and Temperature Monitors

over operating free-air temperature range (unless otherwise noted)
POS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Electrical Characteristics
10.1.1 VBUCKx_UV_TH_5,
VLDOx_UV_TH_5		 Undervoltage monitoring for buck output, programable low-going threshold accuracy UV_THR = 0x0 –5%
10.1.2 VBUCKx_UV_TH_10,
VLDOx_UV_TH_10		 Undervoltage monitoring for buck output and LDO output, programable low-going threshold accuracy UV_THR = 0x1  –10%
10.1.3 VBUCKx_UV_H_ACC,
VLDOx_UV_H_ACC		 Undervoltage Threshold Accuracy, VOUT ≥ 1V VOUT ≥ 1V -1.5% +1.5%
10.1.4 VBUCKx_UV_L_ACC, 
VLDOx_UV_L_ACC		 Undervoltage Threshold Accuracy, VOUT < 1V VOUT < 1V -10 +10 mV
10.1.5 VBUCKx_UV_HYS,
VLDOx_UV_HYS		 Undervoltage Hysteresis  0.25% 1% 1.75%
10.1.6 VBUCKx_SCG_TH, VLDOx_SCG_TH Short-circuit (SCG) and residual voltage (RV) detection low-going threshold 220 260 300 mV
10.1.7 VBUCKx_SCG_HYS, VLDOx_SCG_HYS Short-circuit (SCG) and residual voltage (RV) detection threshold hysteresis 75 mV
10.2.1a TWARM_Rising Temperature rising Warning Threshold (WARM) for each of the four sensors 130 140 150 °C
10.2.1b TWARM_Falling Temperature falling Warning Threshold (WARM) for each of the four sensors 125 135 145 °C
10.2.2a THOT_Rising Temperature rising Shutdown Threshold (TSD, HOT) for each of the four sensors 140 150 160 °C
10.2.2b THOT_Falling Temperature falling Shutdown Threshold (TSD, HOT) for each of the four sensors 130 140 150 °C
10.2.3 THYS Temperature Hysteresis for WARM  for each of the four sensors -5 °C
Timing Requirements
10.3.1a tDEGLITCH Fault Detection Deglitch Time for Under Voltage (UV) and Short to GND (SCG) Measured from UV/SCG event 13 20 27 µs
10.3.1b tDEGLITCH_OC_short Fault Detection Deglitch Time for Over Current (OC), rising edge, short Measured from OC event, rising edge 26 35 45 µs
10.3.1c tDEGLITCH_OC_long Fault Detection Deglitch Time for Over Current (OC), rising edge, long Measured from OC event, rising edge 1.6 2 2.2 ms
10.3.2a tREACTION Fault Reaction Time for Under Voltage (UV) and Short to GND (SCG) (including deglitch time) Measured from UV/SCG event to nINT pulled low 26 40 54 µs
10.3.2b tREACTION_OC_short Fault Reaction Time for Over Current (OC)  (including deglitch time) Measured from UV/OC/SCG event to nINT pulled low 45 65 81 µs
10.3.2c tREACTION_OC_long Fault Detection Deglitch Time for Over Current (OC), rising edge, long Measured from OC event, rising edge 1.6 2 2.2 ms
10.3.2d tREACTION_WARM Fault Reaction Time for Temperature Warning (WARM), Thermal Shutdown (TSD / HOT) Measured from WARM/HOT event to nINT pulled low 525 µs