SLVSH68B June 2023 – June 2024 TPS543B25T
PRODUCTION DATA
The VDRV pin is connected internally to the output of the internal (4.5V nominal) linear regulator (LDO) and to the MOSFET drivers. Bypass VDRV to PGND with a ceramic capacitor. TI recommends a value of 2.2μF to 10μF. The VCC pin is the source for the internal control circuitry. Connect a 10Ω resistor from VDRV to VCC and bypass VCC to AGND with a ceramic capacitor (0.1μF recommended).
Not intended to drive VCC with any source other than VDRV.
Not intended to connect VDRV to any external source or load.