SLVSI90 Data sheet

SLVSI90 November 2024 ESD701-Q1

PRODUCTION DATA

5.7 Electrical Characteristics

At TA = 25°C unless otherwise noted

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_RWM	Reverse stand-off voltage	I_IO < 10nA	-24		24	V
I_LEAK	Leakage current at V_RWM	VIO = ±24V, I/O to GND		2	10	nA
V_BR	Breakdown voltage, I/O to GND ⁽¹⁾	I_IO = ±10mA	25.5		35.5	V
V_HOLD	Holding voltage ⁽²⁾	TLP, IO to GND or GND to IO		31
V_CLAMP	Surge clamping voltage, t_p = 8/20µs ⁽³⁾	I_PP = 3A, I/O to GND		37		V
V_CLAMP	Surge clamping voltage, t_p = 8/20µs ⁽³⁾	I_PP = 3A, GND to I/O		37		V
V_CLAMP	TLP clamping voltage, t_p = 100ns ⁽⁴⁾	I_PP = 16A (100 ns TLP), I/O to GND		41		V
V_CLAMP	TLP clamping voltage, t_p = 100ns ⁽⁴⁾	I_PP = 16A (100 ns TLP), GND to I/O		41		V
R_DYN	Dynamic resistance ⁽⁵⁾	I/O to GND		0.84		Ω
R_DYN	Dynamic resistance ⁽⁵⁾	GND to I/O		0.84		Ω
C_LINE	Line capacitance, IO to GND	V_IO= 0V, f = 1MHz		0.3	0.5	pF

(1) V_BR is defined as the voltage obtained at 1mA when sweeping the voltage up, before the device latches into the snapback state

(2) V_HOLD is defined as the voltage when 1mA is applied, after the device has successfully latched into the snapback state.

(3) Device stressed with 8/20µs exponential decay waveform according to IEC 61000-4-5

(4) Non-repetitive square wave current pulse, Transmission Line Pulse (TLP); ANSI / ESD STM5.5.1-2008

(5) Extraction of R_DYN using least squares fit of TLP characteristics between I = 10A and I = 20A