SLVSI94 November   2024 ESD501-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings - AEC Specifications
    3. 5.3 ESD Ratings - IEC Specifications
    4. 5.4 ESD Ratings - ISO Specifications
    5. 5.5 Recommended Operating Conditions
    6. 5.6 Thermal Information
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Support Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  8. 7Revision History
  9. 8Mechanical, Packaging, and Orderable Information

Electrical Characteristics

At TA = 25°C unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VRWM Reverse stand-off voltage IIO < 10 nA -12 12 V
ILEAK Leakage current at VRWM VIO = ±12 V, I/O to GND 1 10 nA
VBR Breakdown voltage, I/O to GND (1) IIO = ±1 mA 13.2 15 18 V
VCLAMP Surge clamping voltage, tp = 8/20 µs (2) IPP = 3 A, I/O to GND 23 V
IPP = 3 A, GND to I/O 23 V
TLP clamping voltage, tp = 100 ns (3) IPP = ±4 A (100 ns TLP), I/O to GND 19.4 V
IPP = ±16 A (100 ns TLP), I/O to GND 27 V
RDYN Dynamic resistance (4) I/O to GND 0.6 Ω
GND to I/O 0.6
CLINE Line capacitance, IO to GND VIO = 0 V, f = 1 MHz 0.3 0.5 pF
VBR is defined as the voltage obtained at 1 mA when sweeping the voltage up, before the device enters the snapback state
Device stressed with 8/20 µs exponential decay waveform according to IEC 61000-4-5
Non-repetitive square wave current pulse, Transmission Line Pulse (TLP);  ANSI / ESD STM5.5.1-2008
Extraction of RDYN using least squares fit of TLP characteristics between I = 10 A and I = 20 A