SLVUAO9C March   2016  – June 2021 TPS56C215

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Adjustable UVLO
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Efficiency
    3. 2.3  Output Voltage Load Regulation
    4. 2.4  Output Voltage Line Regulation
    5. 2.5  Load Transients
    6. 2.6  Loop Characteristics
    7. 2.7  Output Voltage Ripple
    8. 2.8  Input Voltage Ripple
    9. 2.9  Powering Up
    10. 2.10 Powering Down
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

Powering Up

Figure 2-14 and Figure 2-15 show the start-up waveforms for the TPS56C215EVM-762. In Figure 2-14, the output voltage ramps up as soon as the input voltage reaches the UVLO threshold. In Figure 2-15, the input voltage is initially applied and the output is inhibited by using a jumper at J2 to tie EN to GND. When the jumper is removed, EN is released. When the EN voltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage ramps up to the externally set value of 1.2 V. The input voltage for these plots is 12 V and the load is 1 Ω.

GUID-F8404594-1887-4D1C-A667-5B02EEDE3437-low.gifFigure 2-14 TPS56C215EVM-762 Start-Up Relative to VIN
GUID-9727AE54-19E2-4B5D-B124-FF27501E1C82-low.gifFigure 2-15 TPS56C215EVM-762 Start-Up Relative to Enable