SLVUAO9C March   2016  – June 2021 TPS56C215

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Specification Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Adjustable UVLO
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Efficiency
    3. 2.3  Output Voltage Load Regulation
    4. 2.4  Output Voltage Line Regulation
    5. 2.5  Load Transients
    6. 2.6  Loop Characteristics
    7. 2.7  Output Voltage Ripple
    8. 2.8  Input Voltage Ripple
    9. 2.9  Powering Up
    10. 2.10 Powering Down
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

2.1 Input/Output Connections

The TPS56C215EVM-762 is provided with input/output connectors and test points as shown in Table 2-1. A power supply capable of supplying greater than 4 A must be connected to J1 through a pair of 20-AWG wires or better. The load must be connected to J2 through a pair of 20-AWG wires or better. The maximum load current capability is 12 A. Wire lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP9 is used to monitor the output voltage with TP10 as the ground reference.

Table 2-1 EVM Connectors and Test Points
Reference DesignatorFunction
J1VIN input voltage connector. (See Table 1-1 for VIN range)
J21.2 V at 10 A maximum
J32-pin header for enable. Connect EN to ground to disable, open to enable. VOUT.
J4VOUT, 1.2 V at 10 A maximum
TP1VIN test point
TP2GND test point at VIN connector
TP3Slow Start (SS) test point
TP4PGOOD test point
TP5VREG5 test point
TP6Test point between voltage divider network and output. Used for loop response measurements
TP7SW node test point
TP8AGND test point
TP9VOUT test point
TP10GND test point