SLVUBG8A July   2018  – December 2020 TPS23755

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Electrical Specifications
  4. 3Description
  5. 4Schematic
  6. 5General Configuration and Description
    1. 5.1 Physical Access
  7. 6TPS23755EVM-894 Performance Data
    1. 6.1 Startup to PSE and DCDC Startup
    2. 6.2 Transient Response
    3. 6.3 Efficiency
    4. 6.4 Load Regulation
    5. 6.5 Recovery from VOUT Short
    6. 6.6 Slew Rate Adjust
  8. 7EVM Assembly Drawings and Layout Guidelines
    1. 7.1 PCB Drawings
    2. 7.2 Layout Guidelines
    3. 7.3 EMI Containment
  9. 8Bill of Materials
  10.   Revision History

7.1 PCB Drawings

Figure 7-1 to Figure 7-4 show the component placement and layout of the TPS23755EVM-894.

GUID-C265AE4B-E623-48F6-8C22-AA027C97B10F-low.pngFigure 7-1 Top-Side Component Placement
GUID-0315BDFF-E609-4354-8B87-9F147DA8C1C6-low.pngFigure 7-2 Layer 2 Routing
GUID-49715544-1DA0-4EDA-AD3F-6B382E4D037A-low.pngFigure 7-3 Layer 3 Routing
GUID-336AD42D-348D-4838-90FF-012676DF7E1A-low.pngFigure 7-4 Bottom-Side Routing