SLVUBM5A April   2019  – August 2021 TPS54A24

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Performance Characteristics Summary
    3. 1.3 Modifications
      1. 1.3.1 Output Voltage Setpoint
      2. 1.3.2 Adjustable UVLO
      3. 1.3.3 Component Values to Evaluate Common Output Voltages
  3. 2Test Setup and Results
    1. 2.1  Input/Output Connections
    2. 2.2  Efficiency
    3. 2.3  Output Voltage Load Regulation
    4. 2.4  Load Transient and Loop Response
    5. 2.5  Output Voltage Ripple
    6. 2.6  Input Voltage Ripple
    7. 2.7  Powering Up
    8. 2.8  Powering Down
    9. 2.9  Start-Up Into Pre-Bias
    10. 2.10 Hiccup Mode Current Limit
    11. 2.11 Thermal Performance
  4. 3Board Layout
    1. 3.1 Layout
  5. 4Schematic and Bill of Materials
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
  6. 5Revision History

Powering Up

Figure 2-11 and Figure 2-12 show the start-up waveforms for the TPS54A24EVM-058. In Figure 2-11, the output voltage ramps up as soon as the input voltage reaches the UVLO threshold. In Figure 2-12, the input voltage is initially applied and the output is inhibited by pulling EN to GND using an external function generator. When the EN voltage is increased above the enable-threshold voltage, the start-up sequence begins and the output voltage ramps up to the externally set value of 1.8 V. The input voltage for these plots is 12 V and the load is 1.8 Ω. Alternatively, a jumper at J3 to tie EN to GND can also be used. When the jumper is removed, EN is released and the start-up sequence begins.

GUID-619EADF9-E0CE-4CE9-BFA4-F6E4535588FD-low.gifFigure 2-11 TPS54A24EVM-058 Start-Up Relative to VIN
GUID-3F39BF05-8861-4E1E-AE89-9594C49FCA91-low.gifFigure 2-12 TPS54A24EVM-058 Start-Up Relative to Enable