SLVUBW5A June   2020  – October 2020

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Performance Specification
    2. 1.2 Modification
  3. 2Connector, Test Point and Jumper Descriptions
    1. 2.1 Connector and Test Point Descriptions
    2. 2.2 Jumper Configuration
      1. 2.2.1 JP1 (ENABLE)
      2. 2.2.2 JP2(SYNC)
  4. 3Test Procedure
  5. 4Schematic, Bill of Materials, and Board Layout
    1. 4.1 Schematic
    2. 4.2 Bill of Materials
    3. 4.3 Board Layout
  6. 5Revision History

4.1 Schematic

Figure 4-1 shows the EVM schematic.

GUID-6B73EDF2-183A-4589-9F8F-4F953548136D-low.gifFigure 4-1 TPS552882EVM-2MHz Schematic