The TPS37x-Q1 and TPS38x-Q1 family of devices contain two adjustable reset time delay pins that control the time with which the reset pins de-assert after they reach their valid condition. These pins also serve a dual purpose and act as a manual reset (MR) when connected to logic ground. The user can adjust the configuration of these pins via the jumpers located at J8 and J9. Header J8 serves as the selectable option for CTR1/MR and header J9 serves as the selectable option for CTR2/MR. Position 1 of the header (indicated by a 1) connects the pin to a unstuffed 0603 capacitor pad for the user to solder on a capacitor of choice. Position 2 of the header connects the pin to a 10 nF capacitor tied to ground. Position 3 of the header connects the pin to GND directly, shorting and creating a manual reset. Please see the adjustable Reset Time Delay Configuration on the TPS37x-Q1 datasheet for more detailed information on user programming.