SLVUC06 October   2020 TPS650320-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2EVM Configurations
    1. 2.1 Requirements
    2. 2.2 Operation Instructions
    3. 2.3 Configuring the USB to I2C Adapter
    4. 2.4 Regulator Input Supplies and Features
      1. 2.4.1 Buck 1 Input Supply
      2. 2.4.2 Mid-Vin Buck1 Features
      3. 2.4.3 Buck 2 Input Supply
      4. 2.4.4 Buck 3 Input Supply
      5. 2.4.5 Low-Vin Buck2 and Buck3 Features
      6. 2.4.6 Low Noise LDO Input Supply
      7. 2.4.7 Low Noise LDO Features
    5. 2.5 Selecting the Logic Supply Voltage
  4. 3Test Points
    1. 3.1 Voltage Test Points
  5. 4Graphical User Interface
    1. 4.1 TPS650320-Q1 EVM Debugging
      1. 4.1.1 I2C Communication Port and Adapter Debugging
      2. 4.1.2 Updating MCU Firmware
    2. 4.2 Navigating the GUI
      1. 4.2.1 Home
      2. 4.2.2 Block Diagram
      3. 4.2.3 Registers
      4. 4.2.4 Device Configuration
        1. 4.2.4.1 Using Device Configuration to Define Spin Settings
        2. 4.2.4.2 Configuring the Power Sequence
    3. 4.3 Re-Program PMIC
    4. 4.4 In-Circuit Programming
  6. 5Typical Performance Plots
    1. 5.1 Power Sequence Plots
    2. 5.2 Load Transient Plots
    3. 5.3 Output Voltage Ripple Plots
    4. 5.4 Efficiency Plots
    5. 5.5 LDO Output Noise
  7. 6TPS650320-Q1 EVM Schematic
  8. 7TPS650320-Q1 EVM PCB Layers
  9. 8TPS650320-Q1 EVM Bill of Materials

3.1 Voltage Test Points

The TPS650320-Q1 EVM contains 30 test points for various measurements. Trace assignments to the test points are shown in Table 3-1. For reference, Figure 3-1 demonstrates the test point locations on the EVM.

Table 3-1 TPS650320-Q1 EVM Test Points
Test Point NumberAssociated Trace
TP1SCL
TP2VREG
TP4Buck 1 Output
TP5VBUS
TP6SDA
TP7V1P8_INT
TP9PMIC LDO Input
TP10SEQ
TP11nRSTOUT
TP12Buck 2 Output
TP13Buck 2 Input
TP14VIO

TP15

Buck 3 Output
TP16Buck 3 Input
TP17PMIC LDO Output
TP18Buck 1 Input
TP19GND
TP20GND
TP21USBD_N
TP22GND
TP23GND
TP24VSYS
TP25GND
TP26GND
TP27GND
TP28GND
TP29USBD_P
TP30GND
GUID-20201013-CA0I-RQMN-JFF4-1KCH2THTPDP6-low.pngFigure 3-1 TPS650320-Q1 EVM Test Point Locations