SLVUC47A July 2021 – August 2021 TPSM5601R5
Wire-loop test points and scope probe sockets are included for digital voltmeters (DVM) or oscilloscope probes to aid in the evaluation of the device. Table 2-1(1) describes each test point.
| TEST POINT | DESCRIPTION |
|---|---|
| VIN S+ | Input voltage monitor. Connect the positive lead of a DVM to this point for measuring efficiency. |
| VIN S– | Input ground monitor. Connect the negative lead of a DVM to this point for measuring efficiency. |
| VOUT S+ | Output voltage monitor. Connect the positive lead of a DVM to this point for measuring efficiency, line regulation, and load regulation. |
| VOUT S– | Output ground monitor. Connect the negative lead of a DVM to this point for measuring efficiency, line regulation, and load regulation. |
| PGND | Power ground test points |
| VIN Scope (J2) | Input voltage scope monitor. Connect an oscilloscope probe to this set of points to measure input ripple voltage. |
| VOUT Scope (J3) | Output voltage scope monitor. Connect an oscilloscope probe to this set of points to measure output voltage ripple and transient response. |
| EN (VIN) | Enable test point. EN test point is connected to VIN. Do not connect this test point to ground or any other signal. Use the ENABLE Control header (J5) to disable the device. To monitor the enable signal, monitor pin 2 of header J5. |
| ENABLE Control (J5) | Enable select jumper. Enable or disable the device using a jumper. |
| PGOOD | Power good test point. Monitors the power-good signal of the device. This is an open-drain signal. A 49.9-kΩ resistor is connected to this pin and the PG_PU pin on the EVM. |
| PG_PU | PGOOD pullup test point. Apply a voltage to this pin to use as a pullup voltage for the PGOOD signal. A 49.9-kΩ resistor is connected to this pin and the PGOOD pin on the EVM. |