SLVUC68 September   2021 TPSM5601R5H

 

  1.   Trademarks
  2. 1EVM Setup
  3. 2EVM Connectors and Test Points
  4. 3EVM Parameters
    1. 3.1 Maximum Output Current
    2. 3.2 Maximum VIN and VOUT Configurations
    3. 3.3 Switching Node Behavior
  5. 4Typical Performance
    1. 4.1 Typical Characteristics (VIN = 12 V)
    2. 4.2 Typical Characteristics (VIN = 24 V)
    3. 4.3 Typical Characteristics (VIN = 36 V)
    4. 4.4 Typical Characteristics (VIN = 48 V)
  6. 5Feature Description
    1. 5.1 Enable Pin (EN)
    2. 5.2 Power-Good Pin (PGOOD)
    3. 5.3 System Loop Stability
  7. 6Layout
    1. 6.1 PCB Layout
  8. 7Schematic
  9. 8Bill of Materials (BOM)
  10.   Device Support
    1.     Related Documentation
    2. 9.1 Support Resources

5.2 Power-Good Pin (PGOOD)

The TPSM5601R5H-IBB-EVM has PGOOD level-shifting circuitry (Figure 5-4) integrated to alleviate any problems associated with the offset PGOOD pin voltages by translating the negative output signals of the PGOOD pin. Figure 5-5 demonstrates the typical behavior of the PGOOD signal with the additional level-shifiting circuitry. For a deeper understanding of the PGOOD level-shifting circuitry, see the Inverting Application for the TPSM5601R5H Application Report.

Figure 5-4 PGOOD Level-Shifter
Figure 5-5 PGOOD Signal