SLVUC70 May   2021 TPS22992

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Description
    2. 1.2 Features
  3. 2Electrical Performance
  4. 3Schematic
  5. 4PCB Layout
    1. 4.1 Setup
  6. 5Operation
  7. 6Test Configurations
    1. 6.1 On-Resistance (Ron) Test Setup
    2. 6.2 Rise Time Test Setup
  8. 7Bill of Materials (BOM)

PCB Layout

Figure 2 and Figure3 show the PCB layout images.

GUID-20210510-CA0I-9KDH-67W9-GNG37T5LDXVF-low.gifFigure 4-1 TPS22992EVM Top Layout
GUID-20210510-CA0I-7CX6-VXHD-QWJSLD45FVHN-low.gifFigure 4-2 TPS22992EVM Bottom Layout