SLVUC93 September   2021 TPSM63606

 

  1.   Trademarks
  2. 1High-Density EVM Description
    1. 1.1 Typical Applications
    2. 1.2 Features and Electrical Performance
  3. 2EVM Performance Specifications
  4. 3EVM Photo
  5. 4Test Setup and Procedure
    1. 4.1 EVM Connections
    2. 4.2 EVM Setup
    3. 4.3 Test Equipment
    4. 4.4 Recommended Test Setup
      1. 4.4.1 Input Connections
      2. 4.4.2 Output Connections
    5. 4.5 Test Procedure
      1. 4.5.1 Line/Load Regulation and Efficiency
  6. 5Test Data and Performance Curves
    1. 5.1 Efficiency and Load Regulation Performance
    2. 5.2 Waveforms
    3. 5.3 Bode Plot
    4. 5.4 Thermal Performance
    5. 5.5 EMI Performance
  7. 6EVM Documentation
    1. 6.1 Schematic
    2. 6.2 Bill of Materials
    3. 6.3 PCB Layout
    4. 6.4 Assembly Drawings
    5. 6.5 Multi-Layer Stackup
  8. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
        1. 7.1.1.1 Custom Design With WEBENCH® Tools
    2. 7.2 Documentation Support
      1. 7.2.1 Related Documentation

1 High-Density EVM Description

The TPSM63606EVM features the TPSM63606 synchronous buck power module configured for operation with typical 3-V to 36-V input bus applications (the TPSM63606SEVM features the TPSM63606S, where S denotes pseudo-random spread spectrum frequency modulation). This wide-VIN range DC/DC solution offers outsized voltage rating and operating margin to withstand supply-rail voltage transients.

The output voltage and switching frequency can each be set to one of five popular values by using configuration jumpers. The EVM provides the full 6-A output current rating of the device. The selected input and output capacitors accommodate the entire range of input voltage and the selectable output voltages on the EVM and are available from multiple component vendors. Input and output voltage sense terminals and a test point header facilitate measurement of the following:

  • Efficiency and power dissipation
  • Line and load regulation
  • Load transient response
  • Enable ON/OFF
  • Bode plot (crossover frequency and phase margin)
The header also provides connections for enable (EN), external clock synchronization (SYNC), and power-good (PGOOD) features of the device. The recommended PCB layout maximizes thermal performance and minimizes output ripple and noise. The schematic and layout are the same for the TPSM63606EVM and TPSM63606SEVM. The only difference is the module IC.