SLVUCD5 January   2022 TPS629210E

 

  1.   Trademarks
  2. 1Introduction
  3. 2Performance Specification
  4. 3EVM Configuration and Modification
    1. 3.1 Input and Output Capacitors
    2. 3.2 Configurable Enable Threshold Voltage
    3. 3.3 MODE/S-CONF Setting
    4. 3.4 Power Good
    5. 3.5 Power-Good Pullup Voltage
    6. 3.6 Feedforward Capacitor Option
    7. 3.7 Output Voltage Setting
    8. 3.8 Loop Response Measurement
  5. 4EVM Test Setup
    1. 4.1 Input and Output Connectors
    2. 4.2 Jumper Configuration
      1. 4.2.1 JP1 Enable
      2. 4.2.2 JP2 MODE/S-CONF
      3. 4.2.3 JP3 Power Good
      4. 4.2.4 JP4 PG Pullup Voltage
  6. 5Test Results
  7. 6Board Layout
  8. 7Schematic and Bill of Materials
    1. 7.1 Schematic
    2. 7.2 Bill of Materials
  9. 8References

4.1 Input and Output Connectors

Table 4-1 Input and Output Connector
ConnectorPinsDescription
J1Pin 1 and Pin 2VIN positive input for input supply
Pin 3 and Pin 4S+ and S– input voltage sense. Input voltage measure points
Pin 5 and Pin 6GND return for input supply
J2Pin 1 and Pin 2VOUT output voltage connection
Pin 3 and Pin 4S+ and S– output voltage sense. Output voltage measure points
Pin 5 and Pin 6GND output return connection