SLVUCF6 july   2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Requirements
    1. 2.1 Hardware
    2. 2.2 Software
  6. 3TPS65219 Resources Overview
  7. 4EVM Configuration
    1. 4.1 Configuring the USB to I2C Adapter
    2. 4.2 Configuration Headers
    3. 4.3 Test Points
  8. 5NVM Programming
    1. 5.1 TPS65219EVM-SKT default NVM settings
    2. 5.2 NVM programming in Initialize State
    3. 5.3 NVM programming in Initialize State
  9. 6Graphical User Interface (GUI)
    1. 6.1 TPTS65219 EVM Debugging
    2. 6.2 I2C Communication Port and Adapter Debugging
    3. 6.3 Getting Started
      1. 6.3.1 Finding the GUI
      2. 6.3.2 Downloading the Required Software
      3. 6.3.3 Launching the GUI
      4. 6.3.4 Connecting to the EVM
    4. 6.4 Collateral Page
    5. 6.5 Register Map Page
    6. 6.6 NVM Configuration Page
      1. 6.6.1 NVM Fields
      2. 6.6.2 Create / Load a Custom Configuration
    7. 6.7 Sequence Configuration
    8. 6.8 NVM Programming Page
    9. 6.9 Additional Features
  10. 7Schematics, PCB Layouts, and Bill of Materials
    1. 7.1 TPS65219EVM-SKT Schematic
    2. 7.2 TPS65219EVM-SKT PCB Layers
    3. 7.3 TPS65219EVM-RSM Schematic
    4. 7.4 TPS65219EVM-RSM PCB Layers
    5. 7.5 Bill of Materials

NVM Fields

Register settings can be changed on the NVM Configuration Page and follow the register write setting specified on the Register Map page (Immediate or Deferred).

The PMIC Status tab holds a collection of read-only status registers that show the Device ID values as well as all the power rail enables / interrupts, which are displayed as digital LEDs. This section provides fast visual feedback on the PMIC and its operating conditions.

The Power Resources tab holds register settings for each power rail of the PMIC. Here you also find a reference table for LDO1 and LDO2 configuration settings (For more information on the Load Switch and BYPASS modes, refer to the device data sheet which is included on the Collateral page).

The Sequence tab is used to control power rail sequence and timing registers for both power-up and power-down.

The Digital Pins Configuration tab is used to control settings for digital I/O pins (For details on Multi-function pins, see the PMIC data sheet).

The Mask Settings tab allows you to control fault reporting for PMIC protection features which includes masking for undervoltage, temperature, and interrupt signals.