SLVUCM5 july   2023 TPS6521905 , TPS6521905-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4Programming Instructions
    1. 4.1  Configuring Enable Settings
    2. 4.2  Configuring the Bucks
    3. 4.3  Configuring LDOs
    4. 4.4  Configuring GPIOs
    5. 4.5  Configuring Sequence
    6. 4.6  Configuring Multi-Function Pins
    7. 4.7  Configuring the EN/PB/VSENSE Pin
    8. 4.8  Changing I2C Address
    9. 4.9  Configuring Mask Settings
    10. 4.10 NVM Re-Programming
  8.   A Non-NVM Registers
  9.   B Loading a NVM Configuration File to PMIC
  10.   C PMIC Configurable Fields
  11.   D References

4.8 Changing I2C Address

The TPS6521905 has the default I2C address configured as 0x30. This configuration can be changed if needed by searching for register I2C_ADDRESS_REG in the register map of the TPS65219_GUI and changing the default 0x30 address as shown in Figure 4-9. Once the register is changed, the new value must be saved into the NVM by writing 0x0A to register 0x34.

Note: When using multiple TPS65219 devices in multi-PMIC configuration, each device must have a unique I2C address. The I2C address for the 2nd, 3rd and other PMICs must be changed from the default 0x30 to a new value.

GUID-20230710-SS0I-XTQS-R82V-LSMHLMSN0QDS-low.svg Figure 4-9 I2C_ADDRESS_REG

Table 4-20 I2C_ADDRESS_REG
Register Address Bit
Bit# Field Name
0x26 6-0 I2C_ADDRESS_REG