SLVUCM5 july   2023 TPS6521905 , TPS6521905-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4Programming Instructions
    1. 4.1  Configuring Enable Settings
    2. 4.2  Configuring the Bucks
    3. 4.3  Configuring LDOs
    4. 4.4  Configuring GPIOs
    5. 4.5  Configuring Sequence
    6. 4.6  Configuring Multi-Function Pins
    7. 4.7  Configuring the EN/PB/VSENSE Pin
    8. 4.8  Changing I2C Address
    9. 4.9  Configuring Mask Settings
    10. 4.10 NVM Re-Programming
  8.   A Non-NVM Registers
  9.   B Loading a NVM Configuration File to PMIC
  10.   C PMIC Configurable Fields
  11.   D References

4 Programming Instructions

This section describes the steps required to program the PMIC NVM. The programming process consists of two primarily steps; changing the register settings and saving the new values into the NVM memory. TI recommends programming the NVM in Initialize state, where VSYS is supplied but all of the PMIC outputs and monitors are OFF.

Figure 4-1 shows the steps to reprogram the device. The first command consists of an I2C OFF request to send the device to Initialize state. This command is only needed if the device is not in Initialize state. The second I2C command enables an internal oscillator for I2C communication and disables the rails discharge. The third step requires updating register settings to match specific application requirements following the programming instructions. After the register settings are updated, the new values can be saved into the NVM by writing 0x0A to register address 0x34. The last step "Validation" is optional and consists of an I2C command that compares register settings with NVM content.

Note: The first I2C command (I2C OFF request) is only needed if the PMIC is not in Initialize state. The user programmable OPN TPS6521905 comes with the EN/PB/VSENSE pin configured as "push-button" with the FSD feature disabled by default. When configured as PB, the device detects an ON-request when the pin is pulled low. If this pin has a pull-up to VSYS, then PMIC stays in Initialize state after VSYS is supplied. To verify if I2C communication is available in Initialize state, it is recommended to read the NVM ID register on address 0x01. The read back matches the two digits after the "TPS65219" in the part number. For example, when using TPS6521905, register 0x01 reads 05.

GUID-20230428-SS0I-HLDM-WVCX-3N4ZD8KB8XZL-low.svg Figure 4-1 NVM Programming