SLVUCM5 july   2023 TPS6521905 , TPS6521905-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4Programming Instructions
    1. 4.1  Configuring Enable Settings
    2. 4.2  Configuring the Bucks
    3. 4.3  Configuring LDOs
    4. 4.4  Configuring GPIOs
    5. 4.5  Configuring Sequence
    6. 4.6  Configuring Multi-Function Pins
    7. 4.7  Configuring the EN/PB/VSENSE Pin
    8. 4.8  Changing I2C Address
    9. 4.9  Configuring Mask Settings
    10. 4.10 NVM Re-Programming
  8.   A Non-NVM Registers
  9.   B Loading a NVM Configuration File to PMIC
  10.   C PMIC Configurable Fields
  11.   D References

2 Hardware Requirements for NVM Programming

The PMIC has two memory spaces, the register map space and the NVM space. Re-programming the NVM is done by first writing to the register map through the serial interface (I2C) and then saving the register settings into the NVM. Because the configuration first involves writing to the register map, which controls the regulator and digital pins, there must be no dependency or need to use the PMIC resources. For example, an external power supply must be used to supply the pull-up resistors of the I2C pins instead of using one of the PMIC power resources while reprogramming the NVM. Table 2-1 and Figure 2-1 show the minimum hardware requirements for the hardware setup between the PMIC and the programming device.

Note: Other external components like inductors, capacitors, and so on are not needed to re-program the NVM in Initialize state. However, those components are needed for the PMIC operation in Active state and to validate NVM settings.

Table 2-1 Minimum Hardware Requirements for NVM Programming
Device pin Required Connections
VSYS VSYS voltage must be 3.3V or higher without exceeding the maximum recommended voltage in the spec.
VSYS must have a minimum of 2.2uF capacitance.
VDD1P8 VDD1P8 must have a 2.2uF capacitance
I2C pins Pull-up resistors on I2C pins (SDA/SCL) must be supplied by external 3.3V supply.
I2C pins of the PMIC must be driven by an external I2C device that can communicate with the PMIC and write to the registers.
EN/PB/VSENSE EN/PB/VSENSE pin must be connected to VSYS with a pull-up resistor.
AGND AGND (pin# 15) must be connected to the PCB ground planes through a VIA . Keep the trace from the AGDN pin to the VIA short.
Thermal Pad The package thermal pad must be connected to the PCB ground plane with a minimum of nine VIAS.

GUID-20230428-SS0I-RLMP-QBRF-FTJLKQB02MRX-low.svg Figure 2-1 Hardware Setup for NVM Programming