SLVUCM5 july   2023 TPS6521905 , TPS6521905-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Requirements for NVM Programming
  6. 3Typical NVM Flow
  7. 4Programming Instructions
    1. 4.1  Configuring Enable Settings
    2. 4.2  Configuring the Bucks
    3. 4.3  Configuring LDOs
    4. 4.4  Configuring GPIOs
    5. 4.5  Configuring Sequence
    6. 4.6  Configuring Multi-Function Pins
    7. 4.7  Configuring the EN/PB/VSENSE Pin
    8. 4.8  Changing I2C Address
    9. 4.9  Configuring Mask Settings
    10. 4.10 NVM Re-Programming
  8.   A Non-NVM Registers
  9.   B Loading a NVM Configuration File to PMIC
  10.   C PMIC Configurable Fields
  11.   D References

B Loading a NVM Configuration File to PMIC

The diagram shown in Figure 6-1 describes the process to load a pre-configured NVM file (.CSV or .JSON extension) into the PMIC NVM. The soldered down EVM (TPS65219EVM) is used as a reference but the socketed EVM can be used as well. The TPS6521905 product page has multiple NVM files that are pre-configured to meet the requirements of specific processors or SoCs. TI's customers can reuse these files to re-program the PMICs on their production line or by working with a distributor.

Note: If the pre-configured NVM files do not meet all the application requirements, they can still be loaded to the PMIC NVM, make the necessary changes, and generate a new NVM file using the TPS65219-GUI.

GUID-20230620-SS0I-53TG-883B-PRZP09NBPMFK-low.svg Figure B-1 Loading NVM Configuration File