SLVUCM6 March   2024 TPS65219-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2PDN and Sequence Diagrams
    1. 2.1 TPS6521923W-Q1 Sequence and Power Block Diagram
  6. 3EEPROM Device Settings
    1. 3.1  Device ID
    2. 3.2  Enable Settings
    3. 3.3  Regulator Voltage Settings
    4. 3.4  Sequence Settings
      1. 3.4.1 Power-Up Sequence
      2. 3.4.2 Power-Down Sequence
    5. 3.5  EN / PB / VSENSE Settings
    6. 3.6  Multi-Function Pin Settings
    7. 3.7  Over-Current Deglitch
    8. 3.8  Mask Settings
    9. 3.9  Discharge Check
    10. 3.10 Multi PMIC Config

3.6 Multi-Function Pin Settings

The TPS65219 PMIC has three multi-function pins that can be configured to set the voltage on a specific power rail or to change the frequency mode or to trigger a warm or cold reset. This section describes how each of the multi-function pins are configured.

Table 3-11 Multi-Function Pin Settings
Pin Name Setting Register Address Field Name Value Description
VSEL_SD / VSEL_DDR Function selection 0x1F VSEL_DDR_SD 0x1 VSEL pin configured as SD to set the voltage on the VSEL_RAIL
Rail selection 0x1F VSEL_RAIL 0x0 LDO1

(only applicable if VSEL_DDR_SD=0x1)
pin polarity 0x1F VSEL_SD_POLARITY 0x1 HIGH - 1.8V / LOW - LDOx_VOUT register setting

(only applicable if VSEL_DDR_SD=0x1)
MODE / STBY function selection 0x20 MODE_STBY_CONFIG 0x1 STBY
pin polarity 0x1F MODE_STBY_POLARITY 0x1 [if configured as MODE] HIGH - auto-PFM / LOW - forced PWM. [if configured as a STBY] HIGH - STBY state / LOW - ACTIVE state.
MODE / RESET function selection 0x20 MODE_RESET_CONFIG 0x1 RESET
reset selection 0x20 WARM_COLD_RESET_CONFIG 0x1 WARM RESET
pin polarity 0x1F MODE_RESET_POLARITY 0x0 [if configured as MODE] LOW - auto-PFM / HIGH - forced PWM. [if configured as RESET] LOW - reset / HIGH - normal operation.

Note:

  • If LDO1 (or LDO2) is configured as bypass and the VSEL pin is NOT configured as SD (VSEL_DDR_SD=0x0), the voltage change on the selected VSEL_RAIL can be changed by I2C (register field: VSEL_SD_I2C_CTRL).

    Table 3-12 Default register setting for VSEL_SD_I2C_CTRL
    Register Address Field Name Value Description
    0x1F VSEL_SD_I2C_CTRL 0x1 0x0 = 1.8V

    0x1 = LDOx_VOUT register setting

  • If bucks are configured for quasi-fixed frequency (BUCK_FF_ENABLE=0x0), and none of the multi-function pins are configured as MODE, switching between auto-PFM and forced-PWM can be changed by I2C (register field: MODE_I2C_CTRL).

    Table 3-13 Default register setting for MODE_I2C_CTRL
    Register Address Field Name Value Description
    0x1F MODE_I2C_CTRL 0x1 0x0 = Auto PFM

    0x1 = Forced PWM