SLVUCN2A October   2023  – August 2024 DRV3901-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Overview
    1. 2.1 Connectors and Configuration Headers
    2. 2.2 Signal Test Points
    3. 2.3 LED Indicators
  6. 3EVM GUI Control Application
    1. 3.1 MSP430 FET Drivers
    2. 3.2 Cloud-based GUI
    3. 3.3 Local Installation
  7. 4EVM GUI Operation
    1. 4.1 Hardware Set-up
    2. 4.2 Launching the DRV3901-Q1EVM GUI Application
  8. 5GUI Overview
    1. 5.1 Programming the EVM
    2. 5.2 Saving and Loading Register Configurations
    3. 5.3 Scripting Window
  9. 6Pyro Fuse SPI Modes
    1. 6.1 Stand-alone SPI
    2. 6.2 Addressable SPI
  10. 7Revision History

2.1 Connectors and Configuration Headers

The main power connector J14 (I) is where the VBAT supply is connected. The maximum current the connector can withstand before any damage or malfunction occurs is 20 A. Confirm that the supply current does not exceed this value to prevent potential damage to the board. There is an included 20-A fuse that should protect the board in case the current does exceed 20 A, but protection should not solely rely on the fuse. TI recommends limiting the supply current to below 20 A to further protect the board.

The output connectors J2, J21 are the same as the main power connector.

The NAD_FAULT_x headers select the NAD_FAULT resistor values. By default, 5.6 kΩ and 56 kΩ are chosen for driver A and B respectively. Please read the data sheet for more information on the NAD_FAULT resistors and their function. Table 2-2 lists the available NAD_FAULT resistor values for each header.

Table 2-2 NAD_FAULT resistor selector header values
Header Pins Resistor value to GND
1-2

5.6 kΩ
3-4 12 kΩ
5-6 27 kΩ
7-8 56 kΩ